Issued Patents 2003
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6658539 | Super-coherent data mechanisms for shared caches in a multiprocessing system | Ravi Kumar Arimilli, Guy L. Guthrie, Derek E. Williams | 2003-12-02 |
| 6651162 | Recursively accessing a branch target address cache using a target address previously accessed from the branch target address cache | David S. Levitan, Shashank Nemawarkar, Balaram Sinharoy | 2003-11-18 |
| 6643763 | Register pipe for multi-processing engine environment | Joseph L. Temple, III | 2003-11-04 |
| 6629209 | Cache coherency protocol permitting sharing of a locked data granule | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2003-09-30 |
| 6629214 | Extended cache coherency protocol with a persistent “lock acquired” state | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2003-09-30 |
| 6629212 | High speed lock acquisition mechanism with time parameterized cache coherency states | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2003-09-30 |
| 6625701 | Extended cache coherency protocol with a modified store instruction lock release indicator | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2003-09-23 |
| 6606666 | Method and system for controlling information flow between a producer and a buffer in a high frequency digital system | Robert H. Bell, Jr., Robert Alan Cargnoni, Leo James Clark | 2003-08-12 |
| 6606680 | Method and apparatus for accessing banked embedded dynamic random access memory devices | Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai, Praveen S. Reddy | 2003-08-12 |
| 6604145 | Method and system for controlling information flow in a high frequency digital system from a producer to a buffering consumer via an intermediate buffer and a shared data path | Robert H. Bell, Jr., Robert Alan Cargnoni, Leo James Clark | 2003-08-05 |
| 6601105 | Method and system for controlling information flow between a producer and multiple buffers in a high frequency digital system | Robert H. Bell, Jr., Robert Alan Cargnoni, Leo James Clark | 2003-07-29 |
| 6598086 | Method and system for controlling information flow in a high frequency digital system from a producer to a buffering consumer via an intermediate buffer | Robert H. Bell, Jr., Robert Alan Cargnoni, Leo James Clark | 2003-07-22 |
| 6574719 | Method and apparatus for concurrently communicating with multiple embedded dynamic random access memory devices | Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai, Praveen S. Reddy | 2003-06-03 |
| 6549989 | Extended cache coherency protocol with a “lock released” state | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2003-04-15 |