Issued Patents 2003
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6635526 | Structure and method for dual work function logic devices in vertical DRAM process | Rama Divakaruni, Rajesh Rengarajan | 2003-10-21 |
| 6620676 | Structure and methods for process integration in vertical DRAM cell fabrication | Larry Nesbit, Jochen Beintner, Rama Divakaruni | 2003-09-16 |
| 6541810 | Modified vertical MOSFET and methods of formation thereof | Ramachandra Divakaruni, Prakash Dev, Larry Nesbit | 2003-04-01 |
| 6509226 | Process for protecting array top oxide | Venkatachalam C. Jaiprakash, Jack A. Mandelman, Ramachandra Divakaruni, Mihel Seitz | 2003-01-21 |