JJ

Jody B. Joyner

IBM: 14 patents #27 of 5,539Top 1%
🗺 Texas: #16 of 8,709 inventorsTop 1%
Overall (2003): #646 of 273,478Top 1%
14
Patents 2003

Issued Patents 2003

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDate
6671712 Multi-node data processing system having a non-hierarchical interconnect architecture Ravi Kumar Arimilli, James Stephen Fields, Jr., Guy L. Guthrie, Jerry Don Lewis 2003-12-30
6601145 Multiprocessor system snoop scheduling mechanism for limited bandwidth snoopers that uses dynamic hardware/software controls Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai, Guy L. Guthrie 2003-07-29
6591321 Multiprocessor system bus protocol with group addresses, responses, and priorities Ravi Kumar Arimilli, James Stephen Fields, Jr., Guy L. Guthrie, Jerry Don Lewis 2003-07-08
6591307 Multi-node data processing system and method of queue management in which a queued operation is speculatively cancelled in response to a partial combined response Ravi Kumar Arimilli, James Stephen Fields, Jr., Guy L. Guthrie, Jerry Don Lewis 2003-07-08
6553442 Bus master for SMP execution of global operations utilizing a single token with implied release Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis 2003-04-22
6546469 Multiprocessor system snoop scheduling mechanism for limited bandwidth snoopers Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai, Guy L. Guthrie 2003-04-08
6546468 Multiprocessor system snoop scheduling mechanism for limited bandwidth snoopers performing directory update Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai, Guy L. Guthrie 2003-04-08
6546470 Multiprocessor system snoop scheduling mechanism for limited bandwidth snoopers with banked directory implementation Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai, Guy L. Guthrie 2003-04-08
6535957 System bus read data transfers with bus utilization based data ordering Ravi Kumar Arimilli, Vicente Enrique Chung, Guy L. Guthrie 2003-03-18
6532519 Apparatus for associating cache memories with processors within a multiprocessor data processing system Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai 2003-03-11
6519665 Multi-node data processing system and communication protocol in which a stomp signal is propagated to cancel a prior request Ravi Kumar Arimilli, James Stephen Fields, Jr., Guy L. Guthrie, Jerry Don Lewis 2003-02-11
6519649 Multi-node data processing system and communication protocol having a partial combined response Ravi Kumar Arimilli, James Stephen Fields, Jr., Guy L. Guthrie, Jerry Don Lewis 2003-02-11
6516368 Bus master and bus snooper for execution of global operations utilizing a single token for multiple operations with explicit release Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis 2003-02-04
6507880 Bus protocol, bus master and bus snooper for execution of global operations utilizing multiple tokens Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis 2003-01-14