Issued Patents 1997
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5675759 | Method and apparatus for register management using issue sequence prior physical register and register association validity information | Gene W. Shen, Ravi Swami, Niteen A. Patkar | 1997-10-07 |
| 5673408 | Processor structure and method for renamable trap-stack | Hideki Osone | 1997-09-30 |
| 5673426 | Processor structure and method for tracking floating-point exceptions | Gene W. Shen, John Szeto | 1997-09-30 |
| 5659721 | Processor structure and method for checkpointing instructions to maintain precise state | Gene W. Shen, John Szeto, Niteen A. Patkar | 1997-08-19 |
| 5655115 | Processor structure and method for watchpoint of plural simultaneous unresolved branch evaluation | Gene W. Shen, Hideki Osone, Takumi Maruyama | 1997-08-05 |
| 5651124 | Processor structure and method for aggressively scheduling long latency instructions including load/store instructions while maintaining precise state | Gene W. Shen, John Szeto, Niteen A. Patkar, Michael A. Simone | 1997-07-22 |
| 5649136 | Processor structure and method for maintaining and restoring precise state at any instruction boundary | Gene W. Shen, John Szeto, Niteen A. Patkar | 1997-07-15 |
| 5644742 | Processor structure and method for a time-out checkpoint | Gene W. Shen, John Szeto, Niteen A. Patkar | 1997-07-01 |