Issued Patents 1997
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5687336 | Stack push/pop tracking and pairing in a pipelined processor | Shalesh Thusoo, James S. Blomgren | 1997-11-11 |
| 5675759 | Method and apparatus for register management using issue sequence prior physical register and register association validity information | Michael C. Shebanow, Ravi Swami, Niteen A. Patkar | 1997-10-07 |
| 5673426 | Processor structure and method for tracking floating-point exceptions | John Szeto, Michael C. Shebanow | 1997-09-30 |
| 5659721 | Processor structure and method for checkpointing instructions to maintain precise state | John Szeto, Niteen A. Patkar, Michael C. Shebanow | 1997-08-19 |
| 5655115 | Processor structure and method for watchpoint of plural simultaneous unresolved branch evaluation | Michael C. Shebanow, Hideki Osone, Takumi Maruyama | 1997-08-05 |
| 5651124 | Processor structure and method for aggressively scheduling long latency instructions including load/store instructions while maintaining precise state | John Szeto, Niteen A. Patkar, Michael C. Shebanow, Michael A. Simone | 1997-07-22 |
| 5649136 | Processor structure and method for maintaining and restoring precise state at any instruction boundary | John Szeto, Niteen A. Patkar, Michael C. Shebanow | 1997-07-15 |
| 5644742 | Processor structure and method for a time-out checkpoint | John Szeto, Niteen A. Patkar, Michael C. Shebanow | 1997-07-01 |
| 5598550 | Cache controller for processing simultaneous cache accesses | James S. Golab, William C. Moyer | 1997-01-28 |