Issued Patents 1997
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5696030 | Integrated circuit contacts having improved electromigration characteristics and fabrication methods therefor | — | 1997-12-09 |
| 5691248 | Methods for precise definition of integrated circuit chip edges | Wayne J. Howell, Howard L. Kalter, Patricia E. Marmillion, Anthony M. Palagonia, Bernadette Ann Pierson +1 more | 1997-11-25 |
| 5679609 | Fabrication, testing and repair of multichip semiconductor structures having connect assemblies with fuses | Bruno Roberto Aimi, Andre Conrad Forcier, James M. Leas, Patricia McGuinnes Marmillion, Anthony M. Palagonia +2 more | 1997-10-21 |
| 5677563 | Gate stack structure of a field effect transistor | Carter W. Kaanta, Randy W. Mann, Darrell Meulemans, Gordon Seth Starkey | 1997-10-14 |
| 5670803 | Three-dimensional SRAM trench structure and fabrication method therefor | Kenneth E. Beilstein, Jr., Claude L. Bertin, Francis R. White | 1997-09-23 |
| 5668018 | Method for defining a region on a wall of a semiconductor structure | Joseph E. Gortych | 1997-09-16 |
| 5668399 | Semiconductor device with increased on chip decoupling capacitance | John Andrew Hiltebeitel | 1997-09-16 |
| 5665626 | Method of making a chimney capacitor | — | 1997-09-09 |
| 5663101 | Semiconductor structure having multiple levels of self-aligned interconnection metallization, and methods for its preparation | — | 1997-09-02 |
| 5661330 | Fabrication, testing and repair of multichip semiconductor structures having connect assemblies with fuses | Bruno Roberto Aimi, Andre Conrad Forcier, James M. Leas, Patricia McGuinnes Marmillion, Anthony M. Palagonia +2 more | 1997-08-26 |
| 5656544 | Process for forming a polysilicon electrode in a trench | Albert S. Bergendahl, Claude L. Bertin, Howard L. Kalter, Donald M. Kenney, Chung H. Lam +1 more | 1997-08-12 |
| 5654238 | Method for etching vertical contact holes without substrate damage caused by directional etching | Michael D. Potter, Gorden Seth Starkey, Jr. | 1997-08-05 |
| 5654221 | Method for forming semiconductor chip and electronic module with integrated surface interconnects/components | Stephen E. Luce, Steven H. Voldman | 1997-08-05 |
| 5651857 | Sidewall spacer using an overhang | Patricia E. Marmillion, Anthony M. Palagonia, Bernadette Ann Pierson, Dennis Arthur Schmidt | 1997-07-29 |
| 5602051 | Method of making stacked electrical device having regions of electrical isolation and electrical connection on a given stack level | John K. DeBrosse, Hing Wong | 1997-02-11 |