Issued Patents 1997
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5679605 | Multilevel interconnect structure of an integrated circuit formed by a single via etch and dual fill process | William S. Brennan, H. Jim Fulford, Fred N. Hause, Basab Bandyopadhyay, Mark W. Michael | 1997-10-21 |
| 5654215 | Method for fabrication of a non-symmetrical transistor | Mark I. Gardner, Daniel Kadosh | 1997-08-05 |