Issued Patents 1997
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5679585 | Method for forming metal silicide on a semiconductor surface with minimal effect on pre-existing implants | Mark I. Gardner, Derick J. Wristers, Dim-Lee Kwong | 1997-10-21 |
| 5679605 | Multilevel interconnect structure of an integrated circuit formed by a single via etch and dual fill process | William S. Brennan, Robert Dawson, H. Jim Fulford, Basab Bandyopadhyay, Mark W. Michael | 1997-10-21 |
| 5643825 | Integrated circuit isolation process | Mark I. Gardner, Kuang-Yeh Chang | 1997-07-01 |