Issued Patents 1997
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5679605 | Multilevel interconnect structure of an integrated circuit formed by a single via etch and dual fill process | William S. Brennan, Robert Dawson, Fred N. Hause, Basab Bandyopadhyay, Mark W. Michael | 1997-10-21 |
| 5674788 | Method of forming high pressure silicon oxynitride gate dielectrics | Dirk J. Wristers, Dim-Lee Kwong | 1997-10-07 |
| 5648286 | Method of making asymmetrical transistor with lightly doped drain region, heavily doped source and drain regions, and ultra-heavily doped source region | Mark I. Gardner, Derick J. Wristers | 1997-07-15 |
| 5591681 | Method for achieving a highly reliable oxide film | Dirk J. Wristers, Dim-Lee Kwong | 1997-01-07 |