Issued Patents 1994
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5376578 | Method of fabricating a semiconductor device with raised diffusions and isolation | Seiki Ogura, Joseph F. Shepard, Jr. | 1994-12-27 |
| 5371022 | Method of forming a novel vertical-gate CMOS compatible lateral bipolar transistor | Chang-Ming Hsieh, Shaw-Ning Mei, Ronald W. Knepper, Lawrence F. Wagner, Jr. | 1994-12-06 |
| 5369049 | DRAM cell having raised source, drain and isolation | Joyce Elizabeth Acocella, Seiki Ogura, Nivo Rovedo, Joseph F. Shepard, Jr. | 1994-11-29 |
| 5366923 | Bonded wafer structure having a buried insulation layer | Klaus D. Beyer, Chang-Ming Hsieh, Tsorng-Dih Yuan | 1994-11-22 |
| 5340759 | Method of making a vertical gate transistor with low temperature epitaxial channel | Chang-Ming Hsieh, Seiki Ogura | 1994-08-23 |
| 5341023 | Novel vertical-gate CMOS compatible lateral bipolar transistor | Chang-Ming Hsieh, Shaw-Ning Mei, Ronald W. Knepper, Lawrence F. Wagner, Jr. | 1994-08-23 |
| 5315151 | Transistor structure utilizing a deposited epitaxial base region | Chang-Ming Hsieh, Victor J. Silvestri | 1994-05-24 |
| 5313094 | Thermal dissipation of integrated circuits using diamond paths | Klaus D. Beyer, Chang-Ming Hsieh, David E. Kotecki, Tsoring-Dih Yuan | 1994-05-17 |
| 5300813 | Refractory metal capped low resistivity metal conductor lines and vias | Rajiv V. Joshi, Jerome J. Cuomo, Hormazdyar M. Dalal | 1994-04-05 |
| 5283456 | Vertical gate transistor with low temperature epitaxial channel | Chang-Ming Hsieh, Seiki Ogura | 1994-02-01 |
| 5276338 | Bonded wafer structure having a buried insulation layer | Klaus D. Beyer, Chang-Ming Hsieh, Tsorng-Dih Yuan | 1994-01-04 |