Issued Patents All Time
Showing 51–75 of 86 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7271578 | Voltage monitoring circuit | Hung-Yi Kuo, Jenny Chen | 2007-09-18 |
| 7231309 | Method and apparatus for testing a bridge circuit | Biyun Yeh, Victor Wu | 2007-06-12 |
| 7231560 | Apparatus and method for testing motherboard having PCI express devices | Wayne Tseng | 2007-06-12 |
| 7136955 | Expansion adapter supporting both PCI and AGP device functions | Chun-Yuan Su, Chau-Chad Tsai, Chi-Che Tsai | 2006-11-14 |
| 7124214 | Method and related apparatus for controlling a peripheral device to transfer data to a bus | Chad Tsai, Ju Zhang, Andrew Chuang, Andrew Su | 2006-10-17 |
| 7082489 | Data memory controller that supports data bus invert | Bi-Yun Yeh, Sheng-Chung Wu | 2006-07-25 |
| 7082501 | Remote node accessing local memory by using distributed shared memory | Wei-Long Chen, Wayne Tseng | 2006-07-25 |
| 7051148 | Data transmission sequencing method associated with briding device and application system | Chau-Chad Tsai, Chi-Che Tsai, Wen-Hao Chuang, Chun-Yuan Su | 2006-05-23 |
| 7032092 | Memory controller for supporting a plurality of different memory accesse modes | — | 2006-04-18 |
| 6948057 | Memory modules storing therein boot codes and method and device for locating same | Jih-Hsin Tsai, Hsiang-I Huang | 2005-09-20 |
| 6944730 | Read/write scheduling apparatus of controller chip and method for the same | Sheng-Chung Wu | 2005-09-13 |
| 6941398 | Processing method, chip set and controller for supporting message signaled interrupt | Chau-Chad Tsai, Sheng-Chang Peng, Min-Hung Chen, Meng-Cheng Ku, Huei-Li Chou | 2005-09-06 |
| 6931496 | Data-maintenance method of distributed shared memory system | Wei-Long Chen, Wayne Tseng | 2005-08-16 |
| 6820219 | Integrated testing method for concurrent testing of a number of computer components through software simulation | Hsiang-Chou Huang, Nai-Shung Chang | 2004-11-16 |
| 6738880 | Buffer for varying data access speed and system applying the same | Chia-Hsin Chen, Nai-Shung Chang | 2004-05-18 |
| 6721833 | Arbitration of control chipsets in bus transaction | Chau-Chad Tsai, Sheng-Chang Peng, Chi-Che Tsai | 2004-04-13 |
| 6717885 | Switching circuit capable of improving memory write timing and method thereof | — | 2004-04-06 |
| 6694400 | PCI system controller capable of delayed transaction | Chau-Chad Tsai, Chen-Ping Yang, Sheng-Chang Peng, Tse-Hsien Wang | 2004-02-17 |
| 6687320 | Phase lock loop (PLL) clock generator with programmable skew and frequency | You-Ming Chiu, Jyhfong Lin, Hsin-Chieh Lin, Wei Wang | 2004-02-03 |
| 6684284 | Control chipset, and data transaction method and signal transmission devices therefor | Chau-Chad Tsai, Sheng-Chang Peng, Chi-Che Tsai | 2004-01-27 |
| 6571323 | Memory-access management method and system for synchronous dynamic Random-Access memory or the like | Chih-Kuo Kao | 2003-05-27 |
| 6549964 | Delayed transaction method and device used in a PCI system | Chau-Chad Tsai, Chen-Ping Yang, Sheng-Chang Peng, Tse-Hsien Wang | 2003-04-15 |
| 6546448 | Method and apparatus for arbitrating access to a PCI bus by a plurality of functions in a multi-function master | Chau-Chad Tsai, Chen-Ping Yang, Chi-Che Tsai | 2003-04-08 |
| 6490665 | Memory-access management method and system for synchronous random-access memory or the like | Chih-Kuo Kao, Chia-Hsin Chen | 2002-12-03 |
| 6484281 | Software-based simulation system capable of simulating the combined functionality of a north bridge test module and a south bridge test module | Hsuan-Yi Wang, Nai-Shung Chang | 2002-11-19 |