Issued Patents All Time
Showing 26–50 of 86 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8738924 | Electronic system and digital right management methods thereof | Zhun Huang | 2014-05-27 |
| 8700859 | Transfer request block cache system and method | Shuang Qin, Zhi-Qiang Hui, Xiu-Li Guo | 2014-04-15 |
| 8656074 | Data transmission system and method thereof | Buheng Xu, Jinkuan Tang | 2014-02-18 |
| 8645630 | Stream context cache system | Xiu-Li Guo, Zhi-Qiang Hui, Shuang Qin | 2014-02-04 |
| 8572306 | USB transaction translator and USB transaction translation method | Chin-Sung Hsu, Terrance Shiyang Shih, Jinkuan Tang, Buheng Xu, Hui Jiang | 2013-10-29 |
| 8549184 | USB transaction translator with buffers and a bulk transaction method | Jinkuan Tang, Buheng Xu, Hui Jiang | 2013-10-01 |
| 8521938 | Universal serial bus host controller and control method thereof | Zhiqiang Hui, Shanna Pang, Di Dai | 2013-08-27 |
| 8521031 | Optical transceiver modules and systems and optical transceiving methods | Jinkuan Tang | 2013-08-27 |
| 8504850 | Method and controller for power management | Chung-Che Wu | 2013-08-06 |
| 8499174 | Method and controller for power management | Chung-Che Wu | 2013-07-30 |
| 8473665 | Universal serial bus (USB) transaction translator and a universal serial bus (USB) isochronous-in transaction method | Jinkuan Tang, Buheng Xu, Hui Jiang | 2013-06-25 |
| 8452909 | USB transaction translator and a micro-frame synchronization method adaptable to an USB in isochronous transaction | Jinkuan Tang, Buheng Xu, Hui Jiang | 2013-05-28 |
| 8417853 | Universal serial bus host control methods and universal serial bus host controllers | Di Dai, Zhiqiang Hui, Shanna Pang | 2013-04-09 |
| 8386908 | Data transmission methods and universal serial bus host controllers utilizing the same | Xingchen Chen, Di Dai, Shanna Pang | 2013-02-26 |
| 8270840 | Backward compatible optical USB device | — | 2012-09-18 |
| 8234416 | Apparatus interoperable with backward compatible optical USB device | — | 2012-07-31 |
| 7805567 | Chipset and northbridge with raid access | Chun-Yuan Su, Chau-Chad Tsai | 2010-09-28 |
| 7782313 | Reducing power during idle state | Ruei-Ling Lin, Win Sheng-Cheng | 2010-08-24 |
| 7779215 | Method and related apparatus for accessing memory | Ming-Shi Liou, Bowei Hsieh | 2010-08-17 |
| 7757031 | Data transmission coordinating method and system | Ruei-Ling Lin | 2010-07-13 |
| 7624286 | Power management method of north bridge | Ruei-Ling Lin, Hung-Yi Kuo | 2009-11-24 |
| 7610497 | Power management system with a bridge logic having analyzers for monitoring data quantity to modify operating clock and voltage of the processor and main memory | Ruei-Ling Lin, Hung-Yi Kuo | 2009-10-27 |
| 7594058 | Chipset supporting a peripheral component interconnection express (PCI-E) architecture | Peter Chia, Chad Tsai, Edward Su, Chih-Kuo Kao | 2009-09-22 |
| 7472232 | Method and related apparatus for internal data accessing of computer system | Andrew Su, Chad Tsai | 2008-12-30 |
| 7356632 | Data memory controller that supports data bus invert | Bi-Yun Yeh, Sheng-Chung Wu | 2008-04-08 |