Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7937072 | Mobile phone accessing system and related storage device | Tung-Cheng Kuo, Ching-Sung Yang, Cheng-Jye Liu | 2011-05-03 |
| 7782313 | Reducing power during idle state | Jiin Lai, Win Sheng-Cheng | 2010-08-24 |
| 7757031 | Data transmission coordinating method and system | Jiin Lai | 2010-07-13 |
| 7634609 | Data transmission coordinating method | — | 2009-12-15 |
| 7624286 | Power management method of north bridge | Jiin Lai, Hung-Yi Kuo | 2009-11-24 |
| 7610497 | Power management system with a bridge logic having analyzers for monitoring data quantity to modify operating clock and voltage of the processor and main memory | Jiin Lai, Hung-Yi Kuo | 2009-10-27 |
| 7590876 | Method for adjusting a frequency working between a north bridge chip and a random access memory of a computer system | Hsiu-Ming Chu, Kuang-Jui Ho | 2009-09-15 |
| 7475263 | Method for power management of central processor unit | Jui-Ming Wei, Cheng-Wei Huang, Yao-Chun Su | 2009-01-06 |
| 7315953 | Apparatus and related method of coordinating north bridge and south bridge for processing bus master requests of peripheral devices for controlling a central processing unit to operate in a power-saving state | Yao-Chun Su, Jui-Ming Wei, Cheng-Wei Huang | 2008-01-01 |
| 7047336 | Method for blocking request to bus | Sheng-Chung Wu | 2006-05-16 |
| 6566703 | High speed flash memory with high coupling ratio | Mong-Song Liang, Ching-Hsiang Hsu | 2003-05-20 |
| 6281545 | Multi-level, split-gate, flash memory cell | Mong-Song Liang, Di-Son Kuo, Ching-Hsiang Hsu | 2001-08-28 |
| 6166410 | MONOS flash memory for multi-level logic and method thereof | Ching-Hsiang Hsu, Mong-Song Liang | 2000-12-26 |
| 6054348 | Self-aligned source process | Ching-Hsiang Hsu, Mong-Song Liang | 2000-04-25 |
| 6040217 | Fabricating method of an ultra-fast pseudo-dynamic nonvolatile flash memory | Ching-Hsiang Hsu | 2000-03-21 |
| 5923974 | Method of manufacture of memory device with high coupling ratio | Mong-Song Liang, Ching-Hsiang Hsu | 1999-07-13 |
| 5885868 | Process for fabricating SOI compact contactless flash memory cell | Ching-Hsiang Hsu, Gary Hong | 1999-03-23 |
| 5877523 | Multi-level split- gate flash memory cell | Mong-Song Liang, Di-Son Kuo, Ching-Hsiang Hsu | 1999-03-02 |
| 5851879 | Method for fabricating compact contactless trenched flash memory cell | Ching-Hsiang Hsu, Gary Hong | 1998-12-22 |
| 5851881 | Method of making monos flash memory for multi-level logic | Ching-Hsiang Hsu, Mong-Song Liang | 1998-12-22 |
| 5834806 | Raised-bitline, contactless, trenched, flash memory cell | Ching-Hsiang Hsu, Mong-Song Liang | 1998-11-10 |
| 5796142 | SOI compact contactless flash memory cell | Ching-Hsiang Hsu, Gary Hong | 1998-08-18 |
| 5796141 | Compact contactless trenched flash memory cell | Ching-Hsiang Hsu, Gary Hong | 1998-08-18 |
| 5714412 | Multi-level, split-gate, flash memory cell and method of manufacture thereof | Mong-Song Liang, Di-Son Kuo, Ching-Hsiang Hsu | 1998-02-03 |
| 5679591 | Method of making raised-bitline contactless trenched flash memory cell | Ching-Hsiang Hsu, Mong-Song Liang | 1997-10-21 |