Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12242750 | Ethernet storage system, and information notification method and related apparatus thereof | Huafeng Wen, Qinzhi Wu, Liangchuan Gao | 2025-03-04 |
| 11777552 | Method for transceiving signals and transceiver using the same | Biyun Yeh, Kuo-Ping Liu | 2023-10-03 |
| 11090030 | Ultrasound apparatus and ultrasound emission method | Ying Liu, Kuo-Ping Liu | 2021-08-17 |
| 9853691 | Near field communication technology-based terminal application control method, apparatus, and system | Shengkai Rong, Chunqi Wang | 2017-12-26 |
| 7366927 | Method and device for handling requests for changing system mode | Chen-Ping Yang, Juei-Sheng Sheu | 2008-04-29 |
| 7127539 | Statistic method for arbitration | — | 2006-10-24 |
| 7082385 | Method for verifying optimization of processor link | Ming-Wei Hsu | 2006-07-25 |
| 7024503 | Link bus between control chipsets and arbitration method thereof | — | 2006-04-04 |
| 6941398 | Processing method, chip set and controller for supporting message signaled interrupt | Jiin Lai, Chau-Chad Tsai, Min-Hung Chen, Meng-Cheng Ku, Huei-Li Chou | 2005-09-06 |
| 6934789 | Interface, structure and method for transmitting data of PCI bus which uses bus request signal for judging whether a device supporting dual transmission mode | Chau-Chad Tsai, Hsuan-Yi Wang, Chi-Che Tsai | 2005-08-23 |
| 6925517 | Bus for supporting plural signal line configurations and switch method thereof | Chau-Chad Tsai, Chih-Kuo Kao, Chi-Che Tsai | 2005-08-02 |
| 6721833 | Arbitration of control chipsets in bus transaction | Jiin Lai, Chau-Chad Tsai, Chi-Che Tsai | 2004-04-13 |
| 6694400 | PCI system controller capable of delayed transaction | Jiin Lai, Chau-Chad Tsai, Chen-Ping Yang, Tse-Hsien Wang | 2004-02-17 |
| 6684284 | Control chipset, and data transaction method and signal transmission devices therefor | Jiin Lai, Chau-Chad Tsai, Chi-Che Tsai | 2004-01-27 |
| 6681279 | Method of performing bus arbitration between control chips in a chipset with preemptive capability | — | 2004-01-20 |
| 6549964 | Delayed transaction method and device used in a PCI system | Jiin Lai, Chau-Chad Tsai, Chen-Ping Yang, Tse-Hsien Wang | 2003-04-15 |
| 6463490 | Dual data rate transfer on PCI bus | Hsuan-Yi Wang, Nai-Shung Chang | 2002-10-08 |