Issued Patents All Time
Showing 51–75 of 109 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7379364 | Sensing a signal in a two-terminal memory array having leakage current | Chang Hua Siau, Christophe J. Chevallier | 2008-05-27 |
| 7372753 | Two-cycle sensing in a two-terminal memory array having leakage current | Christophe J. Chevallier, Chang Hua Siau | 2008-05-13 |
| 7330370 | Enhanced functionality in a two-terminal memory array | Christophe J. Chevallier, Steven W. Longcor, Edmond R. Ward, Robert Norman | 2008-02-12 |
| 7327601 | Providing a reference voltage to a cross point memory array | Christophe J. Chevallier | 2008-02-05 |
| 7326979 | Resistive memory device with a treated interface | Wayne Kinney, John Sanchez, Steven W. Longcor, Steve Kuo-Ren Hsia, Edmond R. Ward +1 more | 2008-02-05 |
| 7309616 | Laser annealing of complex metal oxides (CMO) memory materials for non-volatile memory integrated circuits | Makoto Nagashima, Steve Kuo-Ren Hisa | 2007-12-18 |
| 7227767 | Cross point memory array with fast access time | Christophe J. Chevallier | 2007-06-05 |
| 7227775 | Two terminal memory array having reference cells | Christophe J. Chevallier, Steven W. Longcor | 2007-06-05 |
| 7186569 | Conductive memory stack with sidewall | Christophe J. Chevallier, Steve Kuo-Ren Hsia, Wayne Kinney, Steven W. Longcor, Emond Ward | 2007-03-06 |
| 7180772 | High-density NVRAM | Steven W. Longcor, Edmond R. Ward, Wayne Kinney | 2007-02-20 |
| 7158397 | Line drivers that fits within a specified line pitch | Christophe J. Chevallier | 2007-01-02 |
| 7149108 | Memory array of a non-volatile RAM | Christophe J. Chevallier | 2006-12-12 |
| 7149107 | Providing a reference voltage to a cross point memory array | Christophe J. Chevallier | 2006-12-12 |
| 7126841 | Non-volatile memory with a single transistor and resistive memory element | Christophe J. Chevallier | 2006-10-24 |
| 7099179 | Conductive memory array having page mode and burst mode write capability | Christophe J. Chevallier | 2006-08-29 |
| 7095644 | Conductive memory array having page mode and burst mode read capability | Christophe J. Chevallier | 2006-08-22 |
| 7095643 | Re-writable memory with multiple memory layers | Christophe J. Chevallier, Wayne Kinney, Steven W. Longcor, Edmond R. Ward | 2006-08-22 |
| 7082052 | Multi-resistive state element with reactive metal | Wayne Kinney, Edmond R. Ward, Steve Kuo-Ren Hsia, Steven W. Longcor, Christophe J. Chevallier +2 more | 2006-07-25 |
| 7079442 | Layout of driver sets in a cross point memory array | Christophe J. Chevallier, Steven W. Longcor, Wayne Kinney, Edmond R. Ward | 2006-07-18 |
| 7075817 | Two terminal memory array having reference cells | Christophe J. Chevallier, Steven W. Longcor | 2006-07-11 |
| 7071008 | Multi-resistive state material that uses dopants | Wayne Kinney, Christophe J. Chevallier, Steven W. Longcor, Edmond R. Ward, Steve Kuo-Ren Hsia | 2006-07-04 |
| 7067862 | Conductive memory device with conductive oxide electrodes | Steven W. Longcor, Steve Kuo-Ren Hsia, Wayne Kinney, Edmond R. Ward, Christophe J. Chevallier | 2006-06-27 |
| 7063984 | Low temperature deposition of complex metal oxides (CMO) memory materials for non-volatile memory integrated circuits | Makoto Nagashima, Steve Kuo-Ren Hsia, Larry Matheny | 2006-06-20 |
| 7057914 | Cross point memory array with fast access time | Christophe J. Chevallier, Steven W. Longcor, Wayne Kinney, Edmond R. Ward, Steve Kuo-Ren Hsia | 2006-06-06 |
| 7054183 | Adaptive programming technique for a re-writable conductive memory device | Christophe J. Chevallier | 2006-05-30 |