Issued Patents All Time
Showing 51–75 of 102 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9859402 | Method of using an ion implantation process to prevent a shorting issue of a semiconductor device | Rai-Min Huang | 2018-01-02 |
| 9859170 | Method of forming semiconductor structure | Wei-Cyuan Lo, Ming-Jui Chen, Chia-Lin Lu, Jia-Rong Wu, Yi-Hui Lee +8 more | 2018-01-02 |
| 9831133 | Semiconductor devices having metal gate and method for manufacturing semiconductor devices having metal gate | Chao-Hung Lin, Chih-Kai Hsu, Li-Wei Feng, Shih-Hung Tsai, Chien-Ting Lin +7 more | 2017-11-28 |
| 9780199 | Method for forming semiconductor device | Chih-Sen Huang, Yi-Wei Chen, Shih-Fang Tzou | 2017-10-03 |
| 9721841 | Electronic circuit of fin FET and methof for fabricating the electronic circuit | Jun Wang, Yu-Lin Wang, En-Chiuan Liou, Chih-Sen Huang | 2017-08-01 |
| 9698047 | Dummy gate technology to avoid shorting circuit | Chih-Sen Huang, Shih-Fang Tzou, Yi-Wei Chen, Yung-Feng Cheng, Li-Ping Huang +3 more | 2017-07-04 |
| 9698255 | Semiconductor device having gate structure with doped hard mask | Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Feng-Yi Chang, Chih-Sen Huang +1 more | 2017-07-04 |
| 9685337 | Method for fabricating semiconductor device | Jia-Rong Wu, Yi-Hui Lee, Ying-Cheng Liu, Chih-Sen Huang, Chun-Hsien Lin | 2017-06-20 |
| 9673100 | Semiconductor device having contact plug in two dielectric layers and two etch stop layers | Chih-Sen Huang, Yi-Wei Chen, Chien-Ting Lin, Shih-Fang Tzou, Chia-Lin Lu +4 more | 2017-06-06 |
| 9660042 | Semiconductor device and manufacturing method thereof | Jia-Rong Wu, Yi-Hui Lee, Ying-Cheng Liu, Chih-Sen Huang | 2017-05-23 |
| 9613969 | Semiconductor structure and method of forming the same | Wei-Cyuan Lo, Ming-Jui Chen, Chia-Lin Lu, Jia-Rong Wu, Yi-Hui Lee +8 more | 2017-04-04 |
| 9564371 | Method for forming semiconductor device | Tsung-Hung Chang, Jia-Rong Wu, Ching-Ling Lin, Yi-Hui Lee, Chih-Sen Huang +1 more | 2017-02-07 |
| 9548239 | Method for fabricating contact plug in an interlayer dielectric layer | Chia-Lin Lu, Chun-Lung Chen, Feng-Yi Chang, Jia-Rong Wu, Yi-Hui Lee +4 more | 2017-01-17 |
| 9543211 | Semiconductor structure and manufacturing method thereof | Chia-Lin Lu, Chun-Lung Chen, Yu-Cheng Tung, Kun-Yuan Liao, Feng-Yi Chang +3 more | 2017-01-10 |
| 9530778 | Semiconductor devices having metal gate and method for manufacturing semiconductor devices having metal gate | Chao-Hung Lin, Chih-Kai Hsu, Li-Wei Feng, Shih-Hung Tsai, Chien-Ting Lin +7 more | 2016-12-27 |
| 9466521 | Semiconductor device having a patterned metal layer embedded in an interlayer dielectric layer | Ching-Ling Lin, Chih-Sen Huang, Jia-Rong Wu, Tsung-Hung Chang, Yi-Hui Lee +1 more | 2016-10-11 |
| 9455227 | Semiconductor device and method for fabricating the same | Jia-Rong Wu, Yi-Hui Lee, Ying-Cheng Liu, Chih-Sen Huang, Chun-Hsien Lin | 2016-09-27 |
| 9449964 | Semiconductor process | Chih-Sen Huang, Po-Chao Tsao | 2016-09-20 |
| 9412745 | Semiconductor structure having a center dummy region | Jia-Rong Wu, Yi-Hui Lee, Chih-Sen Huang, Yi-Wei Chen | 2016-08-09 |
| 9401358 | Semiconductor device structure | Chih-Sen Huang, Yi-Wei Chen | 2016-07-26 |
| 9349639 | Method for manufacturing a contact structure used to electrically connect a semiconductor device | Chih-Sen Huang | 2016-05-24 |
| 9331171 | Manufacturing method for forming semiconductor structure | Chih-Sen Huang | 2016-05-03 |
| 9324610 | Method for fabricating semiconductor device | Jia-Rong Wu, Tsung-Hung Chang, Ching-Ling Lin, Yi-Hui Lee, Chih-Sen Huang +2 more | 2016-04-26 |
| 9312121 | Method for cleaning contact hole and forming contact plug therein | Yi-Hui Lee, Tsung-Hung Chang, Jia-Rong Wu, Ching-Ling Lin, Chih-Sen Huang +4 more | 2016-04-12 |
| 9306032 | Method of forming self-aligned metal gate structure in a replacement gate process using tapered interlayer dielectric | Ching-Ling Lin, Chih-Sen Huang, Po-Chao Tsao, Jia-Rong Wu, Chien-Ting Lin | 2016-04-05 |