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Integrated circuit having a top side wafer contact and a method of manufacture therefor |
Tony Phan, John Lin, Philip L. Hower |
2010-06-22 |
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Integrated circuit having a top side wafer contact and a method of manufacture therefor |
Tony Phan, John Lin, Philip L. Hower |
2008-03-18 |
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Integrated circuit having a transistor level top side wafer contact and a method of manufacture therefor |
John Lin, Tony Phan, Philip L. Hower, Martin B. Mollat |
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Reduce 1/f noise in NPN transistors without degrading the properties of PNP transistors in integrated circuit technologies |
Joe R. Trogolo, William F. Kyser, Jr. |
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Diode having a double implanted guard ring |
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Reduce 1/f noise in NPN transistors without degrading the properties of PNP transistors in integrated circuit technologies |
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