Issued Patents All Time
Showing 51–75 of 94 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9548752 | Calibration technique for current steering DAC | Neeraj Shrivastava, Supreet Joshi, Himanshu Varshney, Jafar Sadique Kaviladath, Shagun Dusad | 2017-01-17 |
| 9479186 | Gain and offset correction in an interpolation ADC | Srinivas Kumar Reddy Naru, Nagarajan Viswanathan | 2016-10-25 |
| 9013226 | Circuits for improving linearity of metal oxide semiconductor (MOS) transistors | Shagun Dusad | 2015-04-21 |
| 9001712 | Transmit signal cancelation apparatus and methods | Nagarajan Viswanathan, Robert Clair Keller, Thomas Neu, Francesco Dantoni | 2015-04-07 |
| 8920326 | Cancellation of products generated by harmonics of a square wave used in square-wave mixing | Vajeed Nimran P A, Shabbir Amjhera Wala, Shagun Dusad, Sandeep Oswal | 2014-12-30 |
| 8742845 | Amplifier circuits with reduced power consumption | Shagun Dusad, Lokesh Kumar Gupta | 2014-06-03 |
| 8581634 | Source follower input buffer | Nitin Agarwal | 2013-11-12 |
| 8390488 | Non-linearity correction that is independent of input common mode, temperature variation, and process variation | Ganesh Kiran, Viswanathan Nagarajan | 2013-03-05 |
| 8264281 | Low-noise amplifier with tuned input and output impedances | Gireesh Rajendran, Vijaya B. Rentala | 2012-09-11 |
| 8248055 | Voltage reference with improved linearity addressing variable impedance characteristics at output node | Anand Hariraj Udupa | 2012-08-21 |
| 8217691 | Low power clocking scheme for a pipelined ADC | — | 2012-07-10 |
| 8188902 | Ternary search SAR ADC | Yujendara Mitikiri | 2012-05-29 |
| 7969334 | Apparatus for correcting setting error in an MDAC amplifier | Ganesh Kiran | 2011-06-28 |
| 7961123 | Time-interleaved analog-to-digital converter | Viswanathan Nagarajan, Sriram Murali, Sthanunathan Ramakrishnan, Jaiganesh Balakrishnan | 2011-06-14 |
| 7948410 | Multibit recyclic pipelined ADC architecture | Jagannathan Venkataraman, Sandeep Oswal, Samarth S. Modi, Shagun Dusad | 2011-05-24 |
| 7898446 | Correction of sampling mismatch in time-interleaved analog-to-digital converters | Viswanathan Nagarajan, Jagannathan Venkataraman | 2011-03-01 |
| 7885144 | Time-dependant gain control for an amplifier used in receiving echoes | Sandeep Oswal, Jagannathan Venkataraman, Shagun Dusad | 2011-02-08 |
| 7804328 | Source/emitter follower buffer driving a switching load and having improved linearity | Nitin Agarwal | 2010-09-28 |
| 7750737 | Common mode stabilization in a fully differential amplifier | Raghu Nandan Srinivasa, Abhaya Kumar | 2010-07-06 |
| 7595744 | Correcting offset errors associated with a sub-ADC in pipeline analog to digital converters | Nitin Agarwal, Ramesh Kumar Singh, Dantes John, Supreet Joshi | 2009-09-29 |
| 7479816 | Generating multiple delayed signals of different phases from a reference signal using delay locked loop (DLL) | Chun-Chieh Lee, Ramesh Kumar Singh, Abhaya Kumar | 2009-01-20 |
| 7471222 | Providing input signal through a sample and hold circuit with reduced distortion | Sandeep Kesrimal Oswal, Abhaya Kumar | 2008-12-30 |
| 7358801 | Reducing noise and/or power consumption in a switched capacitor amplifier sampling a reference voltage | Sandeep Mallya Perdoor, Ravishankar S. Ayyagari | 2008-04-15 |
| 7310058 | Reducing the time to convert an analog input sample to a digital code in an analog to digital converter (ADC) | Anand Hariraj Udupa, Vikas Sinha, Nitin Agarwal, Sandeep Oswal | 2007-12-18 |
| 7259609 | Clamping circuit | Vineet Mishra, Shakti Shankar Rath, Gautam Salil Nandi | 2007-08-21 |