Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12422474 | Force/measure current gain trimming | Tanmay Neema, Kanak Chandra Das, Rajavelu Thinakaran | 2025-09-23 |
| 12375095 | Digital-to-analog converter circuit with linear programmable gain stage | Deepak Kumar Meher, Tarun Purohit | 2025-07-29 |
| 12028085 | Digital-to-analog converter with digitally controlled trim | Tanmay Neema, Rishubh Khurana, Atul Kumar Agrawal, Deepak Kumar Meher | 2024-07-02 |
| 11936395 | Digital-to-analog converter with digitally controlled trim | Tanmay Neema, Rishubh Khurana, Atul Kumar Agrawal, Deepak Kumar Meher | 2024-03-19 |
| 10948933 | Digital-to-analog converter power-up control | Mit Bhattacharya | 2021-03-16 |
| 10862493 | Techniques to improve linearity of R-2R ladder digital-to-analog converters (DACs) | Atul Kumar Agrawal, Siddharth Malhotra, Tanmay Neema | 2020-12-08 |
| 10673450 | Techniques to improve linearity of R-2R ladder digital-to-analog converters (DACs) | Atul Kumar Agrawal, Siddharth Malhotra, Tanmay Neema | 2020-06-02 |
| 10340941 | Trim digital-to-analog converter (DAC) for an R2R ladder DAC | — | 2019-07-02 |
| 9705524 | R2R digital-to-analog converter circuit | SundaraSiva Rao Giduturi | 2017-07-11 |
| 8791845 | Circuitry and method for reducing area and power of a pipelince ADC | Rishubh Khurana | 2014-07-29 |
| 7259609 | Clamping circuit | Visvesvaraya Pentakota, Vineet Mishra, Shakti Shankar Rath | 2007-08-21 |
| 7161521 | Multi-stage analog to digital converter architecture | Visvesvaraya Pentakota, Nitin Agarwal, Sandeep Kesrimal Oswal | 2007-01-09 |
| 7088149 | Enhancing SNR and throughput performance of integrated circuits | Anand Hariraj Udupa, Visvesvaraya Pentakota, Shakti Shankar Rath, Vineet Mishra, Ravishankar S. Ayyagari +1 more | 2006-08-08 |
| 6906658 | Reducing droop in a reference signal provided to ADCs | Visvesvaraya Pentakota | 2005-06-14 |