Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12224761 | Noise-shaping of additive dither in analog-to-digital converters | Nithin Gopinath, Visvesvaraya Pentakota, Harshit Moondra | 2025-02-11 |
| 12206427 | Lookup table for non-linear systems | Visvesvaraya Pentakota, Srinivas Kumar Reddy Naru, Chirag Chandrahas Shetty, Eeshan Miglani, Narasimhan Rajagopal +1 more | 2025-01-21 |
| 12074607 | Analog-to-digital converter (ADC) having linearization circuit with reconfigurable lookup table (LUT) memory and calibration options | Narasimhan Rajagopal, Nithin Gopinath, Viswanathan Nagarajan, Visvesvaraya Pentakota, Harshit Moondra +1 more | 2024-08-27 |
| 11881867 | Calibration scheme for filling lookup table in an ADC | Narasimhan Rajagopal, Eeshan Miglani, Chirag Chandrahas Shetty, Shagun Dusad, Srinivas Kumar Reddy Naru +8 more | 2024-01-23 |
| 11438001 | Gain mismatch correction for voltage-to-delay preamplifier array | Narasimhan Rajagopal, Chirag Chandrahas Shetty, Prasanth K, Eeshan Miglani | 2022-09-06 |
| 11316525 | Lookup-table-based analog-to-digital converter | Visvesvaraya Pentakota, Narasimhan Rajagopal, Chirag Chandrahas Shetty, Prasanth K, Eeshan Miglani +1 more | 2022-04-26 |
| 11239854 | Non-linearity correction | Jawaharlal Tangudu, Pankaj Gupta, Sreenath Narayanan Potty, Ajai Paulose, Chandrasekhar Sriram +5 more | 2022-02-01 |
| 10930362 | Flexible and efficient device trim support using eFuse | Aravind Ganesan, Jaiganesh Balakrishnan, Nagarajan Viswanathan, Yeswanth Guntupalli, Ajai Paulose +2 more | 2021-02-23 |
| 10741268 | Flexible and efficient device trim support using efuse | Aravind Ganesan, Jaiganesh Balakrishnan, Nagarajan Viswanathan, Yeswanth Guntupalli, Ajai Paulose +2 more | 2020-08-11 |
| 10686461 | Top plate sampling analog-to-digital converter (ADC) with residue amplifier non-linearity reduction | Sai Aditya Nurani, Arun Mohan, Shagun Dusad | 2020-06-16 |
| 10644714 | Pipelined analog-to-digital converter | Arun Mohan | 2020-05-05 |
| 10476542 | Continuous time linear capacitive digital step attenuator | Rajendrakumar Joish, Shagun Dusad, Visvesvaraya Pentakota | 2019-11-12 |
| 10439628 | Top plate sampling circuit including input-dependent dual clock boost circuits | Ani Xavier, Arun Mohan | 2019-10-08 |
| 10425042 | Negative capacitance circuits including temperature-compensation biasings | Ani Xavier, Arun Mohan, Shagun Dusad | 2019-09-24 |
| 10396814 | Reference voltage control circuit for a two-step flash analog-to-digital converter | Jafar Sadique Kaviladath | 2019-08-27 |
| 10320405 | Pattern based estimation of errors in ADC | Srinivas Kumar Reddy Naru, Visvesvaraya Pentakota Appala, Shagun Dusad, Viswanathan Nagarajan, Ani Xavier +3 more | 2019-06-11 |
| 10200052 | Analog-to-digital converter | Jafar Sadique Kaviladath | 2019-02-05 |
| 10181861 | Reference voltage control circuit for a two-step flash analog-to-digital converter | Jafar Sadique Kaviladath | 2019-01-15 |
| 10084466 | Top plate sampling circuit including input-dependent dual clock boost circuits | Ani Xavier, Arun Mohan | 2018-09-25 |
| 9941893 | Pattern based estimation of errors in ADC | Srinivas Kumar Reddy Naru, Visvesvaraya Pentakota Appala, Shagun Dusad, Viswanathan Nagarajan, Ani Xavier +3 more | 2018-04-10 |
| 9548752 | Calibration technique for current steering DAC | Supreet Joshi, Himanshu Varshney, Jafar Sadique Kaviladath, Visvesvaraya Pentakota, Shagun Dusad | 2017-01-17 |
| 8283948 | Capacitor nonlinearity correction | — | 2012-10-09 |
| 7786909 | Analog to digital converter with improved input overload recovery | Anand Hariraj Udupa, Nitin Agarwal | 2010-08-31 |