Issued Patents All Time
Showing 26–50 of 51 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7091766 | Retention register for system-transparent state retention | David B. Scott, Sumanth Katte Gururajarao, Hugh Mair | 2006-08-15 |
| 6989702 | Retention register with normal functionality independent of retention power supply | David B. Scott, Sumanth Katte Gururajarao, Hugh Mair, Peter Cumming, Franck Dahan | 2006-01-24 |
| 6532514 | System and method for handling a power supply interruption in a non-volatile memory | Baher Haroun | 2003-03-11 |
| 6459317 | Sense amplifier flip-flop | Kan Lu, Chongjun Jiang | 2002-10-01 |
| 6344759 | Hybrid data and clock recharging techniques in domino logic circuits minimizes charge sharing during evaluation | Pranjal Srivastava, Patrick W. Bosshart | 2002-02-05 |
| 6192479 | Data processing with progressive, adaptive, CPU-driven power management | — | 2001-02-20 |
| 6151262 | Apparatus, system and method for control of speed of operation and power consumption of a memory | Baher Haroun | 2000-11-21 |
| 6133762 | Family of logic circuits emploting mosfets of differing thershold voltages | Anthony M. Hill | 2000-10-17 |
| 6087886 | Hybrid dual threshold transistor multiplexer | — | 2000-07-11 |
| 6002284 | Split-slave dual-path D flip flop | Anthony M. Hill | 1999-12-14 |
| 5982211 | Hybrid dual threshold transistor registers | — | 1999-11-09 |
| 5955912 | Multiplexer circuits | — | 1999-09-21 |
| 5852370 | Integrated circuits for low power dissipation in signaling between different-voltage on chip regions | — | 1998-12-22 |
| 5809514 | Microprocessor burst mode data transfer ordering circuitry and method | Mitra Nasserbakht | 1998-09-15 |
| 5802270 | Integrated circuit having an embedded digital signal processor and externally testable signal paths | Bernhard H. Andresen, Glen Roy Balko, Stanley C. Keeney, Joe F. Sexton | 1998-09-01 |
| 5793317 | Low power approach to state sequencing and sequential memory addressing in electronic systems | — | 1998-08-11 |
| 5787011 | Low-power design techniques for high-performance CMOS circuits | — | 1998-07-28 |
| 5784291 | CPU, memory controller, bus bridge integrated circuits, layout structures, system and methods | Ian Chen | 1998-07-21 |
| 5767716 | Noise insensitive high performance energy efficient push pull isolation flip-flop circuits | — | 1998-06-16 |
| 5698996 | Data processing with self-timed feature and low power transition detection | — | 1997-12-16 |
| 5699315 | Data processing with energy-efficient, multi-divided module memory architectures | — | 1997-12-16 |
| 5650735 | Low power, high performance latching interfaces for converting dynamic inputs into static outputs | — | 1997-07-22 |
| 5612636 | Short circuit power optimization for CMOS circuits | — | 1997-03-18 |
| 5552726 | High resolution digital phase locked loop with automatic recovery logic | Shannon A. Wichman | 1996-09-03 |
| 5552738 | High performance energy efficient push pull D flip flop circuits | — | 1996-09-03 |