Issued Patents All Time
Showing 25 most recent of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5389809 | Silicided MOS transistor | Richard A. Chapman | 1995-02-14 |
| 5359216 | DRAM process with improved polysilicon-to-polysilicon capacitor and the capacitor | Donald J. Coleman | 1994-10-25 |
| 5302539 | VLSI interconnect method and structure | Thomas C. Holloway | 1994-04-12 |
| RE34535 | Floating gate memory with improved dielectric | James L. Paterson | 1994-02-08 |
| 5244825 | DRAM process with improved poly-to-poly capacitor | Donald J. Coleman | 1993-09-14 |
| 5141890 | CMOS sidewall oxide-lightly doped drain process | — | 1992-08-25 |
| 5122846 | Bistable logic device using trench transistors | — | 1992-06-16 |
| 5098192 | DRAM with improved poly-to-poly capacitor | Donald J. Coleman | 1992-03-24 |
| 5077228 | Process for simultaneous formation of trench contact and vertical transistor gate and structure | Robert H. Eklund | 1991-12-31 |
| 5024960 | Dual LDD submicron CMOS process for making low and high voltage transistors with common gate | — | 1991-06-18 |
| 5021851 | NMOS source/drain doping with both P and As | David B. Scott | 1991-06-04 |
| 5010032 | Process for making CMOS device with both P+ and N+ gates including refractory metal silicide and nitride interconnects | Thomas E. Tang, Che-Chia Wei, Richard A. Chapman | 1991-04-23 |
| 4987093 | Through-field implant isolated devices and method | Clarence W. Teng | 1991-01-22 |
| 4975756 | SRAM with local interconnect | Thomas E. Tang, Che-Chia Wei, Larry R. Hite | 1990-12-04 |
| 4949154 | Thin dielectrics over polysilicon | — | 1990-08-14 |
| 4931411 | Integrated circuit process with TiN-gate transistor | Howard L. Tigelaar, Thomas C. Holloway, Robert Groover, III | 1990-06-05 |
| 4922312 | DRAM process with improved polysilicon-to-polysilicon capacitor and the capacitor | Donald J. Coleman | 1990-05-01 |
| 4894693 | Single-polysilicon dram device and process | Howard L. Tigelaar, Thomas C. Holloway | 1990-01-16 |
| 4890147 | Through-field implant isolated devices and method | Clarence W. Teng | 1989-12-26 |
| 4890141 | CMOS device with both p+ and n+ gates | Thomas E. Tang, Che-Chia Wei, Richard A. Chapman | 1989-12-26 |
| 4851360 | NMOS source/drain doping with both P and As | David B. Scott | 1989-07-25 |
| 4845047 | Threshold adjustment method for an IGFET | Thomas C. Holloway, Richard A. Chapman | 1989-07-04 |
| 4821085 | VLSI local interconnect structure | Thomas C. Holloway | 1989-04-11 |
| 4814854 | Integrated circuit device and process with tin-gate transistor | Howard L. Tigelaar, Thomas C. Holloway, Robert Groover, III | 1989-03-21 |
| 4811078 | Integrated circuit device and process with tin capacitors | Howard L. Tigelaar, Thomas C. Holloway | 1989-03-07 |