Issued Patents All Time
Showing 101–125 of 228 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8952763 | Frequency modulator having digitally-controlled oscillator with modulation tuning and phase-locked loop tuning | Chi-Hsueh Wang | 2015-02-10 |
| 8947172 | Polar transmitter having frequency modulating path with interpolation in compensating feed input and related method thereof | Chi-Hsueh Wang, Kai-Peng Kao | 2015-02-03 |
| 8884670 | Phase locked loop (PLL) with multi-phase time-to-digital converter (TDC) | Kuang-Kai Yen, Feng-Wei Kuo, Huan-Neng Chen, Lee Tsung Hsiung, Hsien-Yuan Liao +1 more | 2014-11-11 |
| 8855236 | Digital amplitude modulation | Sameh S. Rezeq, Dirk Leipold | 2014-10-07 |
| 8830001 | Low power all digital PLL architecture | Jingcheng Zhuang | 2014-09-09 |
| 8823463 | Oscillator circuit and method for generating an oscillation | Akshay Visweswaran, John R. Long | 2014-09-02 |
| 8816780 | Apparatus and method for calibrating timing mismatch of edge rotator operating on multiple phases of oscillator | Chi-Hsueh Wang | 2014-08-26 |
| 8804874 | Polar transmitter having digital processing block used for adjusting frequency modulating signal for frequency deviation of frequency modulated clock and related method thereof | Chi-Hsueh Wang, Kai-Peng Kao | 2014-08-12 |
| 8766719 | Digitally-controlled power amplifier with bandpass filtering/transient waveform control and related digitally-controlled power amplifier cell | Jie Lai, Meng-Hsiung Hung | 2014-07-01 |
| 8749280 | Frequency synthesizer and associated method | Ang-Sheng Lin, Yi-Hsien Cho | 2014-06-10 |
| 8742808 | Digital phase locked loop | Dirk Leipold | 2014-06-03 |
| 8692578 | Transmitter employing pulling mitigation mechanism and related method thereof | Jie Lai, Meng-Hsiung Hung | 2014-04-08 |
| 8675725 | Integrated circuit, communication unit and method for improved amplitude resolution of an RF-DAC | Min PARK | 2014-03-18 |
| 8669890 | Method and apparatus of estimating/calibrating TDC mismatch | Chi-Hsueh Wang, Yi-Hsien Cho | 2014-03-11 |
| 8660209 | Transmitter and frequency deviation reduction method thereof | Kai-Peng Kao, Chi-Hsueh Wang, Ping-Ying Wang | 2014-02-25 |
| 8618837 | Multi-stage digitally-controlled power amplifier | Jie Lai, Meng-Hsiung Hung | 2013-12-31 |
| 8593182 | Frequency synthesizer and associated method | Ang-Sheng Lin, Yi-Hsien Cho | 2013-11-26 |
| 8593189 | Phase locked loop (PLL) with multi-phase time-to-digital converter (TDC) | Kuang-Kai Yen, Feng-Wei Kuo, Huan-Neng Chen, Lee Tsung Hsiung, Hsien-Yuan Liao | 2013-11-26 |
| 8570082 | PVT-free calibration circuit for TDC resolution in ADPLL | Feng-Wei Kuo, Kuang-Kai Yen, Huan-Neng Chen, Hsien-Yuan Liao, Lee Tsung Hsiung +1 more | 2013-10-29 |
| 8564348 | Clock generator for generating output clock having non-harmonic relationship with input clock and related clock generating method thereof | Chi-Hsueh Wang | 2013-10-22 |
| 8559579 | All-digital frequency synthesis with DCO gain calculation | Dirk Leipold, John Wallberg | 2013-10-15 |
| 8542616 | Simultaneous multiple signal reception and transmission using frequency multiplexing and shared processing | Khurram Muhammad, Dirk Leipold | 2013-09-24 |
| 8493107 | Clock generator for generating output clock having non-harmonic relationship with input clock and related clock generating method thereof | Chi-Hsueh Wang | 2013-07-23 |
| 8463189 | Predistortion calibration and built in self testing of a radio frequency power amplifier using subharmonic mixing | Imran Bashir, Oren E. Eliezer | 2013-06-11 |
| 8411793 | Digital amplitude modulation | Sameh S. Rezeq, Dirk Leipold | 2013-04-02 |