YC

Yi-Hsien Cho

ME Mediatek: 13 patents #202 of 2,888Top 7%
AN Alpha Networks: 2 patents #15 of 127Top 15%
Overall (All Time): #309,714 of 4,157,543Top 8%
15
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12388447 Clock and data recovery circuit with spread spectrum clocking synthesizer Chien-Kai Kao 2025-08-12
12003245 Clock and data recovery circuit with spread spectrum clocking synthesizer Chien-Kai Kao 2024-06-04
9923564 Clock data recovery apparatus and method capable of reducing more noise as well as tracking larger frequency offsets Tse-Hsien Yeh 2018-03-20
9306551 Interpolator and interpolation cells with non-uniform driving capabilities therein Kuan-Hua Chao 2016-04-05
9207646 Method and apparatus of estimating/calibrating TDC gain Chi-Hsueh Wang, Robert Bogdan Staszewski 2015-12-08
9037886 Time-to-digital system and associated frequency synthesizer Robert Bogdan Staszewski 2015-05-19
8766684 Charge pump, phase frequency detector and charge pump methods Yu-Li Hsueh, Jing-Hong Conan Zhan 2014-07-01
8749280 Frequency synthesizer and associated method Ang-Sheng Lin, Robert Bogdan Staszewski 2014-06-10
8669890 Method and apparatus of estimating/calibrating TDC mismatch Chi-Hsueh Wang, Robert Bogdan Staszewski 2014-03-11
8593182 Frequency synthesizer and associated method Ang-Sheng Lin, Robert Bogdan Staszewski 2013-11-26
8461933 Device and method for frequency calibration and phase-locked loop using the same Yu-Li Hsueh 2013-06-11
8400199 Charge pump, phase frequency detector and charge pump methods Yu-Li Hsueh, Jing-Hong Conan Zhan 2013-03-19
8175106 Fast and automatic self-forming meshing topology to integrate with wired networks Ming-Wang Guo, Jen-Sheng Huang, Chun-Fu Wang, Ying-Yung Chen, Shang-I Huang +1 more 2012-05-08
7738470 Fast and automatic self-forming meshing topology to integrate with wired networks Ming-Wang Guo, Jen-Sheng Huang, Chun-Fu Wang, Ying-Yung Chen, Shang-I Huang +1 more 2010-06-15
7719345 Reference buffer circuits Yu-Hsin Lin 2010-05-18