Issued Patents All Time
Showing 51–75 of 103 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11714760 | Methods and apparatus to reduce bank pressure using aggressive write merging | Timothy David Anderson, Pete Michael Hippleheuser | 2023-08-01 |
| 11714754 | Shadow caches for level 2 cache controller | Abhijeet Ashok Chachad, David Matthew Thompson | 2023-08-01 |
| 11709677 | Look-up table initialize | Dheera Balasubramanian Samudrala, Duc Quang Bui, Rama Venkatasubramanian | 2023-07-25 |
| 11693790 | Methods and apparatus to facilitate write miss caching in cache system | Timothy David Anderson, Pete Michael Hippleheuser | 2023-07-04 |
| 11693791 | Victim cache that supports draining write-miss entries | Timothy David Anderson, Pete Michael Hippleheuser | 2023-07-04 |
| 11687457 | Hardware coherence for memory controller | Abhijeet Ashok Chachad, David Matthew Thompson | 2023-06-27 |
| 11640357 | Methods and apparatus to facilitate read-modify-write support in a victim cache | Timothy David Anderson, Pete Michael Hippleheuser | 2023-05-02 |
| 11636040 | Methods and apparatus for inflight data forwarding and invalidation of pending writes in store queue | Timothy David Anderson, Pete Michael Hippleheuser | 2023-04-25 |
| 11620230 | Methods and apparatus to facilitate read-modify-write support in a coherent victim cache with parallel data paths | Timothy David Anderson, Pete Michael Hippleheuser | 2023-04-04 |
| 11507513 | Methods and apparatus to facilitate an atomic operation and/or a histogram operation in cache pipeline | Timothy David Anderson, Pete Michael Hippleheuser | 2022-11-22 |
| 11461236 | Methods and apparatus for allocation in a victim cache system | Timothy David Anderson, Pete Michael Hippleheuser | 2022-10-04 |
| 11455169 | Look-up table read | Dheera Balasubramanian Samudrala, Duc Quang Bui, Alan L. Davis | 2022-09-27 |
| 11449432 | Methods and apparatus for eviction in dual datapath victim cache system | Timothy David Anderson, Pete Michael Hippleheuser | 2022-09-20 |
| 11442868 | Aggressive write flush scheme for a victim cache | Timothy David Anderson, Pete Michael Hippleheuser | 2022-09-13 |
| 11436015 | Look-up table read | Duc Quang Bui, Dheera Balasubramanian Samudrala, Rama Venkatasubramanian | 2022-09-06 |
| 11403229 | Methods and apparatus to facilitate atomic operations in victim cache | Timothy David Anderson, Pete Michael Hippleheuser | 2022-08-02 |
| 11392498 | Aliased mode for cache controller | Abhijeet Ashok Chachad, Timothy David Anderson, Pramod Kumar Swami, David Matthew Thompson, Neelima Muralidharan | 2022-07-19 |
| 11360905 | Write merging on stores with different privilege levels | Timothy David Anderson, Pete Michael Hippleheuser | 2022-06-14 |
| 11347649 | Victim cache with write miss merging | Timothy David Anderson, Pete Michael Hippleheuser | 2022-05-31 |
| 11334494 | Write merging on stores with different tags | Timothy David Anderson, Pete Michael Hippleheuser | 2022-05-17 |
| 11314644 | Cache size change | Abhijeet Ashok Chachad, David Matthew Thompson, Neelima Muralidharan | 2022-04-26 |
| 11307987 | Tag update bus for updated coherence state | Abhijeet Ashok Chachad, David Matthew Thompson, Peter Michael Hippleheuser | 2022-04-19 |
| 11294707 | Global coherence operations | Abhijeet Ashok Chachad, David Matthew Thompson, Neelima Muralidharan | 2022-04-05 |
| 11275692 | Methods and apparatus for multi-banked victim cache with dual datapath | Timothy David Anderson, Pete Michael Hippleheuser | 2022-03-15 |
| 11269636 | Look-up table write | Duc Quang Bui, Dheera Balasubramanian Samudrala | 2022-03-08 |