| 6226766 |
Method and apparatus for built-in self-test of smart memories |
— |
2001-05-01 |
| 6154861 |
Method and apparatus for built-in self-test of smart memories |
— |
2000-11-28 |
| 5877059 |
Method for forming an integrated circuit resistor comprising amorphous silicon |
— |
1999-03-02 |
| 5751987 |
Distributed processing memory chip with embedded logic having both data memory and broadcast memory |
Shivaling S. Mahant-Shetti, Derek Smith, Basavaraj I. Pawate, George R. Doddington, Warren L. Bean +1 more |
1998-05-12 |
| 5751162 |
Field programmable gate array logic module configurable as combinational or sequential circuits |
Mahesh M. Mehendale, Shivaling S. Mahant-Shetti, Manisha Agarwala, Robert J. Landers |
1998-05-12 |
| 5723988 |
CMOS with parasitic bipolar transistor |
Shivaling S. Mahant-Shetti, Lawrence A. Arledge, Jr., Ravishankar Sundaresan |
1998-03-03 |
| 5489796 |
Integrated circuit resistor comprising amorphous silicon |
— |
1996-02-06 |
| 5488315 |
Adder-based base cell for field programmable gate arrays |
Shivaling S. Mahant-Shetti, Manisha Agarwala, Mahesh M. Mehendale, Robert J. Landers |
1996-01-30 |
| 5485105 |
Apparatus and method for programming field programmable arrays |
David D. Wilmoth |
1996-01-16 |
| 5469078 |
Programmable logic device routing architecture |
— |
1995-11-21 |
| 5428304 |
Programmable gate array with special interconnects for adjacent gates and isolation devices used during programming |
Robert J. Landers, Jeffrey A. Niehaus, Daniel Edmonson |
1995-06-27 |
| 5426614 |
Memory cell with programmable antifuse technology |
— |
1995-06-20 |
| 5287304 |
Memory cell circuit and array |
Shivaling S. Mahant-Shetti, Howard L. Tigelaar |
1994-02-15 |
| 5068825 |
Memory cell circuit and operation thereof |
Shivaling S. Mahant-Shetti |
1991-11-26 |