Issued Patents All Time
Showing 276–300 of 865 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9372229 | PSD/PSC serial scan path having first and second strobe inputs | — | 2016-06-21 |
| 9366726 | Tap with flip-flop command circuit selecting data register routing circuit | — | 2016-06-14 |
| 9360521 | Programmable access test compression architecture input and output shift registers | — | 2016-06-07 |
| 9362188 | TSV scan cell comparator coupled to voltage reference and response | — | 2016-06-07 |
| 9347992 | IC and core taps with input and linking module circuitry | Baher Haroun, Brian J. Lasher, Anjali Vij | 2016-05-24 |
| 9347994 | Boundary scan with coarse and fine delay register clock circuitry | — | 2016-05-24 |
| 9329234 | IC die test, scan, and capture, shift, and update circuitry | — | 2016-05-03 |
| 9329233 | TAP with AUX capture input, gated capture and shiftDR outputs | — | 2016-05-03 |
| 9329232 | Scan response reuse method and apparatus | — | 2016-05-03 |
| 9329231 | Serial input/output, source/destination bus data multiplexer, flip flop, and controller circuitry | — | 2016-05-03 |
| 9329230 | Enable and select inputs operate combinational logic parallel scan paths | — | 2016-05-03 |
| 9322879 | Integrated circuit wafer having integrated circuit die with plural comparators receiving expected data and mask data from different pads | Alan Hales | 2016-04-26 |
| 9322877 | TMS/TDI and SIPO controller circuitry with tap and trace interfaces | — | 2016-04-26 |
| 9322875 | Core circuitry, test access mechanism, scan frame input register, decompressor | — | 2016-04-26 |
| 9316692 | Tap clock and enable control of scan register, flip-flop, comparator | — | 2016-04-19 |
| 9291675 | Boundary control scan cells, data cells, resynchronization memories, and multiplexers | — | 2016-03-22 |
| 9285425 | Test access mechanism, controller, selector, scan router, external data bus | — | 2016-03-15 |
| 9261559 | IC tap with dual port router and additional update input | — | 2016-02-16 |
| 9261558 | Interposer monitor coupled to clock, start, enable of monitor trigger | — | 2016-02-16 |
| 9245812 | Die with separate functional input, test out, enable input buffers | Richard L. Antley | 2016-01-26 |
| 9242858 | Instruction register delay select outputs to clock delay circuitry | — | 2016-01-26 |
| 9229056 | IC die top, bottom signals, tap lock, test, scan circuitry | — | 2016-01-05 |
| 9222977 | Semiconductor test system and method | — | 2015-12-29 |
| 9222975 | IC core DDR separate test controller, selector, scan router circuitry | — | 2015-12-29 |
| 9217773 | Addressable tap selection aux i/o, linking, address, instruction, control circuitry | — | 2015-12-22 |