Issued Patents All Time
Showing 26–50 of 84 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6194636 | Maize RS324 promoter and methods for use thereof | Emil Orozco, Lucille B. Laccetti | 2001-02-27 |
| 6049483 | Nonvolatile memory device having program and/or erase voltage clamp | John F. Schreck, Brian W. Huber | 2000-04-11 |
| 5684239 | Monocot having dicot wound-inducible promoter | Ray J. Wu, Deping Xu | 1997-11-04 |
| 5641876 | Rice actin gene and promoter | Ray J. Wu | 1997-06-24 |
| 5641701 | Method for fabricating a semiconductor device with laser programable fuses | Hideyuki Fukuhara, Yoichi Miyai | 1997-06-24 |
| 5523249 | Method of making an EEPROM cell with separate erasing and programming regions | Manzur Gill, Sung-Wei Lin, Inn K. Lee | 1996-06-04 |
| 5412603 | Method and circuitry for programming floating-gate memory cell using a single low-voltage supply | John F. Schreck, Cetin Kaya | 1995-05-02 |
| 5334550 | Method of producing a self-aligned window at recessed intersection of insulating regions | Sung-Wei Lin, Manzur Gill | 1994-08-02 |
| 5313427 | EEPROM array with narrow margin of voltage thresholds after erase | John F. Schreck, Pradeep L. Shah | 1994-05-17 |
| 5313432 | Segmented, multiple-decoder memory array and method for programming a memory array | Sung-Wei Lin, John F. Schreck, Phat C. Truong, Harvey J. Stiegler, Benjamin H. Ashmore, Jr. +1 more | 1994-05-17 |
| 5287315 | Skewed reference to improve ones and zeros in EPROM arrays | John F. Schreck, Debra J. Dolby, Eddie Hearl Breashears, John Howard MacPeak | 1994-02-15 |
| 5177705 | Programming of an electrically-erasable, electrically-programmable, read-only memory array | Sebastiano D'Arrigo, Manzur Gill, Sung-Wei Lin | 1993-01-05 |
| 5173436 | Method of manufacturing an EEPROM with trench-isolated bitlines | Manzur Gill, Sebastiano D'Arrigo | 1992-12-22 |
| 5155055 | Method of making an electrically-erasable, electrically-programmable read-only memory cell with self-aligned tunnel | Manzur Gill, Sung-Wei Lin, C. Rinn Cleavelin | 1992-10-13 |
| 5151760 | Integrated circuit with improved capacitive coupling | Manzur Gill | 1992-09-29 |
| 5110753 | Cross-point contact-free floating-gate memory array with silicided buried bitlines | Manzur Gill | 1992-05-05 |
| 5057446 | Method of making an EEPROM with improved capacitive coupling between control gate and floating gate | Manzur Gill | 1991-10-15 |
| 5051795 | EEPROM with trench-isolated bitlines | Manzur Gill, Sebastiano D'Arrigo | 1991-09-24 |
| RE33694 | Dynamic memory array with segmented bit lines | — | 1991-09-17 |
| 5047981 | Bit and block erasing of an electrically erasable and programmable read-only memory array | Manzur Gill, Sung-Wei Lin, Iano D'Arrigo | 1991-09-10 |
| 5025494 | Cross-point contact-free floating-gate memory array with silicided buried bitlines | Manzur Gill | 1991-06-18 |
| 5014099 | Dynamic RAM cell with trench capacitor and trench transistor | — | 1991-05-07 |
| 5008721 | Electrically-erasable, electrically-programmable read-only memory cell with self-aligned tunnel | Manzur Gill, Sung-Wei Lin, C. Rinn Cleavelin | 1991-04-16 |
| 4908797 | Dynamic memory array with quasi-folded bit lines | — | 1990-03-13 |
| 4896293 | Dynamic ram cell with isolated trench capacitors | — | 1990-01-23 |