Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11670386 | Method for suppressing gate oxide tunnel current in non-volatile memory to reduce disturbs | Stephen Keith Heinrich-Barna, Clyde F. Dunn, Aswin N. Mehta | 2023-06-06 |
| 11239346 | Split gate memory cell fabrication and system | Douglas Ticknor Grider, Brian K. Kirkpatrick | 2022-02-01 |
| 11189626 | Partially disposed gate layer into the trenches | Xiang-Zheng Bo, Douglas T. Grider | 2021-11-30 |
| 10553596 | Select gate self-aligned patterning in split-gate flash memory cell | Xiangzheng Bo, Douglas T. Grider | 2020-02-04 |
| 10535409 | Method for suppressing gate oxide tunnel current in non-volatile memory to reduce disturbs | Stephen Keith Heinrich-Barna, Clyde F. Dunn, Aswin N. Mehta | 2020-01-14 |
| 10446563 | Partially disposed gate layer into the trenches | Xiang-Zheng Bo, Douglas T. Grider | 2019-10-15 |
| 9966380 | Select gate self-aligned patterning in split-gate flash memory cell | Xiangzheng Bo, Douglas T. Grider | 2018-05-08 |
| 8391068 | Adaptive programming for flash memories | Douglas Edward Shelton, Eddie Hearl Breashears, Bruce Lynn Pickelsimer | 2013-03-05 |
| 8238158 | Programming of memory cells in a nonvolatile memory using an active transition control | Douglas Edward Shelton, Bruce Lynn Pickelsimer | 2012-08-07 |
| 8199577 | Ripple programming of memory cells in a nonvolatile memory | Douglas Edward Shelton, Eddie Hearl Breashears | 2012-06-12 |
| 6784056 | Flash memory cell process using a hardmask | Paul Schneider, Freidoon Mehrad | 2004-08-31 |
| 6667210 | Flash memory cell process using a hardmask | Paul Schneider, Freidoon Mehrad | 2003-12-23 |
| 6284599 | Method to fabricate a semiconductor resistor in embedded flash memory application | Freidoon Mehrad, George R. Misium | 2001-09-04 |
| 5287315 | Skewed reference to improve ones and zeros in EPROM arrays | John F. Schreck, Debra J. Dolby, David J. McElroy, Eddie Hearl Breashears | 1994-02-15 |