Issued Patents All Time
Showing 26–50 of 57 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6831337 | Transistor circuit with varying resistance lightly doped diffused regions for electrostatic discharge (“ESD”) protection | Zhiqiang Wu | 2004-12-14 |
| 6773972 | Memory cell with transistors having relatively high threshold voltages in response to selective gate doping | Andrew Marshall, Youngmin Kim, Douglas E. Mercer | 2004-08-10 |
| 6730582 | Transistor circuit with varying resistance lightly doped diffused regions for electrostatic discharge (ESD) protection | Zhiqiang Wu | 2004-05-04 |
| 6727578 | Semiconductor device having power supply voltage routed through substrate | Heng-Chih Lin | 2004-04-27 |
| 6678202 | Reduced standby power memory array and method | — | 2004-01-13 |
| 6620692 | Method of forming a metal oxide semiconductor transistor with self-aligned channel implant | Dan M. Mosher | 2003-09-16 |
| 6426655 | Row decoder with switched power supply | Stewart M. DeSoto | 2002-07-30 |
| 6278297 | Row decoder with switched power supply | Stewart M. DeSoto | 2001-08-21 |
| 6249452 | Semiconductor device having offset twisted bit lines | — | 2001-06-19 |
| 6178136 | Semiconductor memory device having Y-select gate voltage that varies according to memory cell access operation | Heng-Chih Lin, Takumi Nasu | 2001-01-23 |
| 6141259 | Dynamic random access memory having reduced array voltage | Donald J. Coleman | 2000-10-31 |
| 5656524 | Method of forming a polysilicon resistor using an oxide, nitride stack | Robert H. Eklund, Douglas A. Prinslow | 1997-08-12 |
| 5552724 | Power-down reference circuit for ECL gate circuitry | — | 1996-09-03 |
| 5506874 | Phase detector and method | Martin J. Izzard | 1996-04-09 |
| 5424660 | DECL logic gates which operate with a 3.3 volt supply or less | Harold D. Goodpaster | 1995-06-13 |
| 5352924 | Bipolar layout for improved performance | Shivaling S. Mahant-Shetti | 1994-10-04 |
| 5291444 | Combination DRAM and SRAM memory array | Hiep Van Tran | 1994-03-01 |
| 5227269 | Method for fabricating high density DRAM reticles | — | 1993-07-13 |
| 5104817 | Method of forming bipolar transistor with integral base emitter load resistor | — | 1992-04-14 |
| 5102811 | High voltage bipolar transistor in BiCMOS | — | 1992-04-07 |
| 5079441 | Integrated circuit having an internal reference circuit to supply internal logic circuits with a reduced voltage | — | 1992-01-07 |
| 5070381 | High voltage lateral transistor | Hiep V. Tran | 1991-12-03 |
| 5021851 | NMOS source/drain doping with both P and As | Roger A. Haken | 1991-06-04 |
| 5019888 | Circuit to improve electrostatic discharge protection | Patrick W. Bosshart, James D. Gallia | 1991-05-28 |
| 4984196 | High performance bipolar differential sense amplifier in a BiCMOS SRAM | Hiep V. Tran | 1991-01-08 |