Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5625220 | Sublithographic antifuse | David Kuan-Yu Liu, Kueing-Long Chen | 1997-04-29 |
| 5595922 | Process for thickening selective gate oxide regions | Howard L. Tigelaar, Richard A. Chapman, Andrew T. Appel | 1997-01-21 |
| 5365105 | Sidewall anti-fuse structure and method for making | David Kuan-Yu Liu, Kueing-Long Chen | 1994-11-15 |
| 5225363 | Trench capacitor DRAM cell and method of manufacture | Allan T. Mitchell, Clarence W. Teng | 1993-07-06 |
| 5168334 | Non-volatile semiconductor memory | Allan T. Mitchell | 1992-12-01 |
| 5143860 | High density EPROM fabricaiton method having sidewall floating gates | Allan T. Mitchell, Howard L. Tigilaar | 1992-09-01 |
| 5120672 | Fabricating a single level merged EEPROM cell having an ONO memory stack substantially spaced from the source region | Allan T. Mitchell | 1992-06-09 |
| 5105245 | Trench capacitor DRAM cell with diffused bit lines adjacent to a trench | Allan T. Mitchell, Clarence W. Teng | 1992-04-14 |
| 5057886 | Non-volatile memory with improved coupling between gates | Howard L. Tigelaar | 1991-10-15 |
| 4980309 | Method of making high density EEPROM | Allan T. Mitchell | 1990-12-25 |
| 4924437 | Erasable programmable memory including buried diffusion source/drain lines and erase lines | James L. Paterson, David D. Wilmoth | 1990-05-08 |
| 4853895 | EEPROM including programming electrode extending through the control gate electrode | Allan T. Mitchell | 1989-08-01 |
| 4839705 | X-cell EEPROM array | Howard L. Tigelaar, Allan T. Mitchell, James L. Paterson | 1989-06-13 |
| 4829019 | Method for increasing source/drain to channel stop breakdown and decrease P+/N+ encroachment | Allan T. Mitchell, Howard L. Tigelaar | 1989-05-09 |
| 4827323 | Stacked capacitor | Howard L. Tigelaar | 1989-05-02 |
| 4812885 | Capacitive coupling | — | 1989-03-14 |
| 4685197 | Fabricating a stacked capacitor | Howard L. Tigelaar | 1987-08-11 |