Issued Patents All Time
Showing 26–45 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9721987 | Pixel with transistor gate covering photodiode | — | 2017-08-01 |
| 9502463 | Method for fabricating image sensor device | — | 2016-11-22 |
| 9368543 | Image sensor device | — | 2016-06-14 |
| 9318630 | Pixel with raised photodiode structure | — | 2016-04-19 |
| 7320912 | Trench capacitors with buried isolation layer formed by an oxidation process and methods for manufacturing the same | Ming-Sheng Tung | 2008-01-22 |
| 7241659 | Volatile memory devices and methods for forming same | Chin Long Hung, Hong-Long Chang | 2007-07-10 |
| 7098102 | Shallow trench isolation structure and dynamic random access memory, and fabricating methods thereof | Jason Chen | 2006-08-29 |
| 7034354 | Semiconductor structure with lining layer partially etched on sidewall of the gate | Ming-Sheng Tung | 2006-04-25 |
| 7009238 | Deep-trench capacitor with hemispherical grain silicon surface and method for making the same | Shih-Lung Chen | 2006-03-07 |
| 6987044 | Volatile memory structure and method for forming the same | Shih-Lung Chen | 2006-01-17 |
| 6953961 | DRAM structure and fabricating method thereof | Shih-Lung Chen | 2005-10-11 |
| 6903029 | Method of reducing thick film stress of spin-on dielectric and the resulting sandwich dielectric structure | Ching-Fa Yeh, Chih-Chuan Hsu, Kwo-Hau Wu, Shuo Wang | 2005-06-07 |
| 6855610 | Method of forming self-aligned contact structure with locally etched gate conductive layer | Ming-Sheng Tung | 2005-02-15 |
| 6849529 | Deep-trench capacitor with hemispherical grain silicon surface and method for making the same | Shih-Lung Chen | 2005-02-01 |
| 6821842 | [DRAM structure and fabricating method thereof] | Shih-Lung Chen | 2004-11-23 |
| 6774461 | Method of reducing thick film stress of spin-on dielectric and the resulting sandwich dielectric structure | Ching-Fa Yeh, Chih-Chuan Hsu, Kwo-Hau Wu, Shuo Wang | 2004-08-10 |
| 6680237 | Method of manufacturing deep trench capacitor | Shih-Lung Chen, Hsiao-Lei Wang, Hwei-Lin Chuang | 2004-01-20 |
| 6486057 | Process for preparing Cu damascene interconnection | Ching-Fa Yeh, Chien-Hsing Lin | 2002-11-26 |
| 6294832 | Semiconductor device having structure of copper interconnect/barrier dielectric liner/low-k dielectric trench and its fabrication method | Ching-Fa Yeh, Kwo-Hau Wu, Yuh-Ching Su | 2001-09-25 |
| 6251753 | Method of sidewall capping for degradation-free damascene trenches of low dielectric constant dielectric by selective liquid-phase deposition | Ching-Fa Yeh, Yuh-Ching Su, Kwo-Hau Wu | 2001-06-26 |