YT

Yu-Wei Ting

TSMC: 36 patents #941 of 12,232Top 8%
NT Nanya Technology: 17 patents #39 of 775Top 6%
Overall (All Time): #48,086 of 4,157,543Top 2%
53
Patents All Time

Issued Patents All Time

Showing 26–50 of 53 patents

Patent #TitleCo-InventorsDate
9286973 Device and method for forming resistive random access memory cell Chih-Yang Chang, Wen-Ting Chu, Chun-Yang Tsai, Kuo-Ching Huang 2016-03-15
9230647 Metal line connection for improved RRAM reliability, semiconductor arrangement comprising the same, and manufacture thereof Chun-Yang Tsai, Kuo-Ching Huang 2016-01-05
9178040 Innovative approach of 4F2 driver formation for high-density RRAM and MRAM Chun-Yang Tsai, Kuo-Ching Huang 2015-11-03
9153672 Vertical BJT for high density memory Chun-Yang Tsai, Kuo-Ching Huang 2015-10-06
9087577 Hybrid memory Chun-Yang Tsai, Kuo-Ching Huang 2015-07-21
9082705 Method of forming an embedded memory device Kuo-Ching Huang, Chih-Yang Pai 2015-07-14
9053781 Structure and method for a forming free resistive random access memory with multi-level cell Chun-Yang Tsai, Kuo-Ching Huang 2015-06-09
9019743 Method and structure for resistive switching random access memory with high reliable and high density Chun-Yang Tsai, Kuo-Ching Huang 2015-04-28
8953370 Memory cell with decoupled read/write path Kuo-Ching Huang, Chun-Yang Tsai 2015-02-10
8869436 Resistive switching random access memory structure and method to recreate filament and recover resistance window Chun-Yang Tsai, Kuo-Ching Huang 2014-10-28
8853021 Embedded transistor Kuo-Ching Huang 2014-10-07
8587047 Capacitor formation for a pumping circuit Shing-Hwa Renn, Yu-Teh Chiang, Chung-Ren Li, Tieh-Chiang Wu 2013-11-19
8552478 Corner transistor and method of fabricating the same Tieh-Chiang Wu, Yu-Teh Chiang 2013-10-08
7381575 Device and method for detecting alignment of active areas and memory cell structures in DRAM devices Tie Jiang Wu, Chien-Chang Huang, Bo Ching Jiang, Chin-Ling Huang 2008-06-03
7217581 Misalignment test structure and method thereof Chien-Chang Huang, Tie Jiang Wu, Chin-Ling Huang, Bo Ching Jiang 2007-05-15
7091545 Memory device and fabrication method thereof Tieh-Chiang Wu, Chien-Chang Huang, Chin-Ling Huang, Bo Ching Jiang 2006-08-15
7026647 Device and method for detecting alignment of active areas and memory cell structures in DRAM devices Tie Jiang Wu, Chien-Chang Huang, Bo Ching Jiang, Chin-Ling Huang 2006-04-11
7015050 Misalignment test structure and method thereof Chien-Chang Huang, Tie Jiang Wu, Chin-Ling Huang, Bo Ching Jiang 2006-03-21
6984534 Method and device for detecting whether the alignment of bit line contacts and active areas in DRAM devices is normal Tie Jiang Wu, Chien-Chang Huang, Bo Ching Jiang, Chin-Ling Huang 2006-01-10
6946678 Test key for validating the position of a word line overlaying a trench capacitor in DRAMs Tie Jiang Wu, Chien-Chang Huang, Bo Ching Jiang 2005-09-20
6902942 Device and method for detecting alignment of deep trench capacitors and word lines in DRAM devices Tie Jiang Wu, Chien-Chang Huang, Bo Ching Jiang, Chin-Ling Huang 2005-06-07
6891216 Test structure of DRAM Chien-Chang Huang, Tie Jiang Wu, Chin-Ling Huang, Bo Ching Jiang 2005-05-10
6875654 Memory device and fabrication method thereof Tieh-Chiang Wu, Chien-Chang Huang, Chin-Ling Huang, Bo Ching Jiang 2005-04-05
6844207 Method and device for detecting whether the alignment of bit line contacts and active areas in DRAM devices is normal Tie Jiang Wu, Chien-Chang Huang, Bo Ching Jiang, Chin-Ling Huang 2005-01-18
6838296 Device and method for detecting alignment of deep trench capacitors and active areas in DRAM devices Tie Jiang Wu, Chien-Chang Huang, Bo Ching Jiang 2005-01-04