Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11955444 | Semiconductor structure and manufacturing method thereof | Manikandan ARUMUGAM, Tsung-Yi Yang, Chien-Chih Chen, Mu-Han Cheng | 2024-04-09 |
| 10038000 | Memory cell and fabricating method thereof | Cheng-Yi Wu, Jian-Shin Tsai, Min-Hui Lin, Wei-Li Chen, Chao-Ching Chang +2 more | 2018-07-31 |
| 7205634 | MIM structure and fabrication process with improved capacitance reliability | Miao-Cheng Liao, Cheng-Chao Lin, Shao-Ta Hsu, Ying-Lang Wang | 2007-04-17 |
| 7072261 | Driving method | Hsin-Tung Yu, Shun-Yi Tung | 2006-07-04 |
| 6577926 | Method of detecting and controlling in-situ faults in rapid thermal processing systems | Shih-Hui Chang, Cheng-Kun Lin, Wen Zen Chiu | 2003-06-10 |
| 6376156 | Prevent defocus issue on wafer with tungsten coating on back-side | Chen-Peng Fan, Chien-Chih Chou, Sheng Lin | 2002-04-23 |
| 6191035 | Recipe design to prevent tungsten (W) coating on wafer backside for those wafers with poly Si on wafer backside | Chen-Mei Fan | 2001-02-20 |
| 6146991 | Barrier metal composite layer featuring a thin plasma vapor deposited titanium nitride capping layer | Ting-Chun Wang | 2000-11-14 |
| 6017791 | Multi-layer silicon nitride deposition method for forming low oxidation temperature thermally oxidized silicon nitride/silicon oxide (no) layer | Chen-Jong Wang, Chue-San Yoo | 2000-01-25 |
| 5923988 | Two step thermal treatment procedure applied to polycide structures deposited using dichlorosilane as a reactant | Chi-Di An, Wen Jan Lin, Hung-Che Liao, Jer-Yuan Sheu | 1999-07-13 |
| 5763303 | Rapid thermal chemical vapor deposition procedure for a self aligned, polycide contact structure | Jhon Jhy Liaw | 1998-06-09 |