Issued Patents All Time
Showing 51–75 of 96 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11968843 | Processing core and MRAM memory unit integrated on a single chip | Chung-Te Lin, Yen-Chung Ho, Pin-Cheng Hsu, Han-Ting Tsai | 2024-04-23 |
| 11963365 | Back-end active device, semiconductor device and semiconductor chip | Yun-Feng Kao | 2024-04-16 |
| 11935966 | Transistor device having ultraviolet attenuating capability | Neil Quinn Murray, Ming-Yen Chuang, Chung-Te Lin | 2024-03-19 |
| 11937426 | Memory device and manufacturing method thereof | Feng-Ching Chu, Feng-Cheng Yang, Chung-Te Lin, Chieh-Fang Chen | 2024-03-19 |
| 11916121 | Tri-gate orthogonal channel transistor and methods of forming the same | Chung-Te Lin | 2024-02-27 |
| 11915736 | Ferroelectric memory operation bias and power domains | Chung-Te Lin | 2024-02-27 |
| 11895832 | Memory integrated circuit | Yun-Feng Kao, Ming-Yen Chuang, Chia-En Huang | 2024-02-06 |
| 11895825 | Semiconductor device including integrated capacitor and vertical channel transistor and methods of forming the same | Yun-Feng Kao | 2024-02-06 |
| 11856782 | Three-dimensional memory device and method | Chia-Yu Ling, Chung-Te Lin | 2023-12-26 |
| 11854619 | Memory device with content addressable memory units | — | 2023-12-26 |
| 11856114 | Device signature based on trim and redundancy information | Shih-Lien Linus Lu | 2023-12-26 |
| 11856751 | Drain sharing for memory cell thin film access transistors and methods for forming the same | Ken-Ichi Goto, Chia-Yu Ling, Neil Quinn Murray, Chung-Te Lin | 2023-12-26 |
| 11848332 | Semiconductor device and manufacturing method thereof | Gao-Ming Wu, Chien-Hao Huang, Chung-Te Lin | 2023-12-19 |
| 11843056 | Semiconductor structure and manufacturing method thereof | Neil Quinn Murray, Chung-Te Lin | 2023-12-12 |
| 11839071 | Vertical access transistors and methods for forming the same | Ming-Yen Chuang | 2023-12-05 |
| 11818894 | Semiconductor device and method of manufacturing the same | Chia-Yu Ling, Chung-Te Lin | 2023-11-14 |
| 11778836 | Memory cell with unipolar selectors | Chung-Te Lin, Mauricio Manfrini | 2023-10-03 |
| 11776647 | Memory repair using optimized redundancy utilization | Chien-Hao Huang, Cheng-Yi Wu, Chung-Te Lin | 2023-10-03 |
| 11769568 | Method for LUT-free memory repair | — | 2023-09-26 |
| 11749341 | Multinary bit cells for memory devices and network applications and method of manufacturing the same | Chung-Te Lin | 2023-09-05 |
| 11716862 | Non-volatile memory with dual gated control | Chung-Te Lin | 2023-08-01 |
| 11715546 | Memory array test method and system | Chien-Hao Huang, Cheng-Yi Wu, Chung-Te Lin | 2023-08-01 |
| 11716855 | Three-dimensional memory device and method | Chia-Yu Ling, Chung-Te Lin | 2023-08-01 |
| 11695039 | Semiconductor device including an active component and a barrier pattern surrounding the active component and method of forming the same | Chien-Hao Huang, Gao-Ming Wu, Yun-Feng Kao, Ming-Yen Chuang | 2023-07-04 |
| 11687412 | Processing-in-memory instruction set with homomorphic error correction | — | 2023-06-27 |