DP

Dirk Pfaff

TSMC: 10 patents #2,782 of 12,232Top 25%
DT Diablo Technologies: 4 patents #4 of 11Top 40%
SY Synopsys: 2 patents #669 of 2,302Top 30%
📍 Schreiber, CA: #60 of 2,446 inventorsTop 3%
Overall (All Time): #285,620 of 4,157,543Top 7%
16
Patents All Time

Issued Patents All Time

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDate
12335074 Multi-tap decision feed-forward equalizer with precursor and postcursor taps Chaitanya Palusa, Rob Abbott, Wei-Li Chen, Po-Hsiang Lan, Cheng-Hsiang Hsieh 2025-06-17
12155509 Continuous time linear equalizer with programmable inductive high frequency boost Jingjing Xia, David A. Yokoyama-Martin 2024-11-26
12119828 Clock synthesizer with dual control Ralph Mason, Robert Abbott, Christopher Falkingham 2024-10-15
12074737 SerDes receiver with optimized CDR pulse shaping Chaitanya Palusa, Rob Abbott, Rolando Solano Ramirez, Wei-Li Chen, Cheng-Hsiang Hsieh +1 more 2024-08-27
11962441 Multi-tap decision feed-forward equalizer with precursor and postcursor taps Chaitanya Palusa, Rob Abbott, Wei-Li Chen, Po-Hsiang Lan, Cheng-Hsiang Hsieh 2024-04-16
11398933 Multi-tap decision feed-forward equalizer with precursor and postcursor taps Chaitanya Palusa, Rob Abbott, Wei-Li Chen, Po-Hsiang Lan, Cheng-Hsiang Hsieh 2022-07-26
11240075 SerDes receiver with optimized CDR pulse shaping Chaitanya Palusa, Rob Abbott, Rolando Solano Ramirez, Wei-Li Chen, Cheng-Hsiang Hsieh +1 more 2022-02-01
10911272 Multi-tap decision feed-forward equalizer with precursor and postcursor taps Chaitanya Palusa, Rob Abbott, Wei-Li Chen, Po-Hsiang Lan, Cheng-Hsiang Hsieh 2021-02-02
10904044 Serdes receiver with optimized CDR pulse shaping Chaitanya Palusa, Rob Abbott, Rolando Solano Ramirez, Wei-Li Chen, Cheng-Hsiang Hsieh +1 more 2021-01-26
10868506 Line drivers for wireline transmission devices Xin Wang 2020-12-15
10498301 Line drivers for wireline transmission devices Xin Wang 2019-12-03
8754685 Delay locked loop Muhammad Nummer 2014-06-17
8218705 Linear phase interpolator and phase detector Gholamreza Yousefi Moghaddam, Sivakumar Kanesapillai 2012-07-10
7902886 Multiple reference phase locked loop Claus Reitlingshoefer, Stephen Hobbs 2011-03-08
7796652 Programmable asynchronous first-in-first-out (FIFO) structure with merging capability Claus Reitlingshoefer, Riccardo Badalone 2010-09-14
7777581 Voltage Controlled Oscillator (VCO) with a wide tuning range and substantially constant voltage swing over the tuning range Volodymyr Yavorskyy 2010-08-17