Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12198469 | System and method for scalable cloud-based recognition and analysis | Soodeh Farokhi, Amir Abolhassani, Felix-Olivier Duguay, Aldo Enrique Vargas Moreno | 2025-01-14 |
| 12008115 | System and method for privacy-aware analysis of video streams | Soodeh Farokhi, Amir Abolhassani, Felix-Olivier Duguay, Neil Barrett, Mostafa Erfani +1 more | 2024-06-11 |
| 11789662 | System and method of interfacing co-processors and input/output devices via a main memory system | Michael L. Takefman, Maher Amer | 2023-10-17 |
| 11640836 | System and method for providing a configurable timing control for a memory system | Michael L. Takefman, Maher Amer, Claus Reitlingshoefer | 2023-05-02 |
| 11527105 | System and method for scalable cloud-robotics based face recognition and face analysis | Soodeh Farokhi, Amir Abolhassani, Felix-Olivier Duguay, Aldo Enrique Vargas Moreno | 2022-12-13 |
| 11422749 | System and method of interfacing co-processors and input/output devices via a main memory system | Michael L. Takefman, Maher Amer | 2022-08-23 |
| 11062743 | System and method for providing a configurable timing control for a memory system | Michael L. Takefman, Maher Amer, Claus Reitlingshoefer | 2021-07-13 |
| 10942682 | System and method of interfacing co-processors and input/output devices via a main memory system | Michael L. Takefman, Maher Amer | 2021-03-09 |
| 10725704 | System and method of interfacing co-processors and input/output devices via a main memory system | Michael L. Takefman, Maher Amer | 2020-07-28 |
| 10580465 | System and method for providing a configurable timing control for a memory system | Michael L. Takefman, Maher Amer, Claus Reitlingshoefer | 2020-03-03 |
| 10168954 | System and method of interfacing co-processors and input/output devices via a main memory system | Michael L. Takefman, Maher Amer | 2019-01-01 |
| 9779020 | System and method for providing an address cache for memory map learning | Michael L. Takefman, Maher Amer | 2017-10-03 |
| 9575908 | System and method for unlocking additional functions of a module | Michael L. Takefman, Maher Amer | 2017-02-21 |
| 9552175 | System and method for providing a command buffer in a memory system | Michael L. Takefman, Maher Amer | 2017-01-24 |
| 9444495 | System and method of interfacing co-processors and input/output devices via a main memory system | Michael L. Takefman, Maher Amer | 2016-09-13 |
| 8972805 | System and method of interfacing co-processors and input/output devices via a main memory system | Michael L. Takefman, Maher Amer | 2015-03-03 |
| 8713379 | System and method of interfacing co-processors and input/output devices via a main memory system | Michael L. Takefman, Maher Amer | 2014-04-29 |
| 8315349 | Bang-bang phase detector with sub-rate clock | — | 2012-11-20 |
| 8081677 | Receiver-based adaptive equalizer with pre-cursor compensation | — | 2011-12-20 |
| 7940839 | Fully adaptive equalization for high loss communications channels | Marcel Lapointe, Albert Vareljian | 2011-05-10 |
| 7796652 | Programmable asynchronous first-in-first-out (FIFO) structure with merging capability | Claus Reitlingshoefer, Dirk Pfaff | 2010-09-14 |