Issued Patents All Time
Showing 26–50 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9019753 | Two-port SRAM write tracking scheme | Bing Wang, Kuoyuan (Peter) Hsu | 2015-04-28 |
| 8997031 | Timing delay characterization method, memory compiler and computer program product | Shaojie Xu, Yukit Tang, Pao-Po Hou, Annie-Li-Keow Lum | 2015-03-31 |
| 8988948 | Memory macro with a voltage keeper | Bing Wang, Allen Fan, Yukit Tang, Annie-Li-Keow Lum, Kuoyuan (Peter) Hsu | 2015-03-24 |
| 8976614 | Tracking scheme for memory | Yong Zhang, Dongsik Jeong, Young Suk Kim, Kuoyuan (Peter) Hsu | 2015-03-10 |
| 8964492 | Tracking mechanism for writing to a memory cell | Kuoyuan (Peter) Hsu, Bing Wang, Yukit Tang, Kai-Po FAN | 2015-02-24 |
| 8942053 | Generating and amplifying differential signals | Chung-Ji Lu, Hung-Jen Liao, Cheng Hung Lee, Annie-Li-Keow Lum, Hong-Chen Cheng | 2015-01-27 |
| 8935641 | Semiconductor circuit design method, memory compiler and computer program product | Shaojie Xu, Yukit Tang, Pao-Po Hou, Annie-Li-Keow Lum | 2015-01-13 |
| 8929154 | Layout of memory cells | Jacklyn Chang, Yukit Tang, Kuoyuan (Peter) Hsu | 2015-01-06 |
| 8913440 | Tracking mechanisms | Annie-Li-Keow Lum, Yukit Tang, Kuoyuan (Peter) Hsu | 2014-12-16 |
| 8907428 | Cell circuits and layouts used in write tracking circuits and read tracking circuits | Jacklyn Chang, Kuoyuan (Peter) Hsu | 2014-12-09 |
| 8878585 | Slicer and method of operating the same | Ming-Chieh Huang, Chan-Hong Chern, Tao Wen Chung, Chih-Chang Lin, Tsung-Ching Huang | 2014-11-04 |
| 8830782 | Memory circuits having a plurality of keepers | Annie-Li-Keow Lum, Young Seog Kim | 2014-09-09 |
| 8817568 | Dual rail memory | Kuoyuan (Peter) Hsu, Dong Sik Jeong, Young Suk Kim, Young Seog Kim, Yukit Tang | 2014-08-26 |
| 8792292 | Providing row redundancy to solve vertical twin bit failures | Hong-Chen Cheng, Jung-Ping Yang, Chung-Ji Lu, Cheng Hung Lee, Hung-Jen Liao | 2014-07-29 |
| 8760948 | Multiple bitcells tracking scheme semiconductor memory array | Bing Wang, Kuoyuan (Peter) Hsu, Jacklyn Chang, Young Suk Kim | 2014-06-24 |
| 8743581 | Memory devices having break cells | Yukit Tang, Kuoyuan (Peter) Hsu | 2014-06-03 |
| 8704376 | Layout of memory strap cell | Jacklyn Chang, Evan Y. W. Zhang, Kuoyuan (Peter) Hsu | 2014-04-22 |
| 8643422 | Slicer and method of operating the same | Ming-Chieh Huang, Chan-Hong Chern, Tao Wen Chung, Chih-Chang Lin, Tsung-Ching Huang | 2014-02-04 |
| 8619478 | System and method for generating a clock | Annie-Li-Keow Lum, Bing Wang | 2013-12-31 |
| 8619477 | Two-port SRAM write tracking scheme | Bing Wang, Kuoyuan (Peter) Hsu | 2013-12-31 |
| 8605523 | Tracking capacitive loads | Young Seog Kim, Kuoyuan (Peter) Hsu, Bing Wang, Annie-Li-Keow Lum | 2013-12-10 |
| 8587991 | Recycling charges | Young Seog Kim, Kuoyuan (Peter) Hsu, Young Suk Kim | 2013-11-19 |
| 8576611 | Memory with regulated ground nodes | Kuoyuan (Peter) Hsu, Yukit Tang, Young Seog Kim | 2013-11-05 |
| 8519444 | Modified design rules to improve device performance | Annie-Li-Keow Lum, Cheng Hung Lee, Chung-Ji Lu, Hong-Chen Cheng, Vineet Agrawal +2 more | 2013-08-27 |
| 8450778 | Method and apparatus for memory cell layout | Jacklyn Chang, Kuoyuan (Peter) Hsu | 2013-05-28 |