Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12087355 | Adaptive control circuit of static random access memory | — | 2024-09-10 |
| 10176853 | Pre-processing circuit with data-line DC immune clamping and associated method and sensing circuit | Chi-Hao Hong, Yi-Wei Chen, Yi-Ping Kuo, Shu-Lin Lai | 2019-01-08 |
| 9640229 | Memory circuit and layout structure of a memory circuit | Chia-Wei Wang | 2017-05-02 |
| 9142285 | Multi-port SRAM with shared write bit-line architecture and selective read path for low power operation | Wei Hwang | 2015-09-22 |
| 8891289 | Ten-transistor dual-port SRAM with shared bit-line architecture | Wei Hwang | 2014-11-18 |
| 7701755 | Memory having improved power design | Yen-Huei Chen, Hung-Jen Liao, Kun-Lung Chen, Yung-Lung Lin | 2010-04-20 |
| 7577052 | Power switching circuit | Jui-Jen Wu, Kun-Lung Chen, Hung-Jen Liao, Yung-Lung Lin, Chen Yen-Huei | 2009-08-18 |
| 7535788 | Dynamic power control for expanding SRAM write margin | Jui-Jen Wu, Kun-Lung Chen, Hung-Jen Liao, Yung-Lung Lin, Chen Yen-Huei | 2009-05-19 |
| 7505319 | Method and apparatus for high efficiency redundancy scheme for multi-segment SRAM | Jui-Jen Wu, Yung-Lung Lin, Yen-Huei Chen | 2009-03-17 |
| 7468903 | Circuits for improving read and write margins in multi-port SRAMS | Hung-Jen Liao, Kun-Lung Chen, Yung-Lung Lin, Jui-Jen Wu, Chen Yen-Huei | 2008-12-23 |
| 7420835 | Single-port SRAM with improved read and write margins | Ping-Wei Wang | 2008-09-02 |