CW

Chung-Cheng Wu

TSMC: 66 patents #468 of 12,232Top 4%
UM United Microelectronics: 8 patents #720 of 4,560Top 20%
MV Mosel Vitelic: 7 patents #35 of 482Top 8%
NC Niko Semiconductor Co.: 5 patents #8 of 41Top 20%
PA Power Management Associates: 2 patents #1 of 9Top 15%
IS Integrated Circuit Solution: 1 patents #4 of 16Top 25%
VT Via Technologies: 1 patents #566 of 1,108Top 55%
📍 Jinshanmian, TW: #21 of 466 inventorsTop 5%
Overall (All Time): #17,106 of 4,157,543Top 1%
92
Patents All Time

Issued Patents All Time

Showing 76–92 of 92 patents

Patent #TitleCo-InventorsDate
6175394 Capacitively coupled field effect transistors for electrostatic discharge protection in flat panel displays Wen-Jyh Sah 2001-01-16
6164562 Rotary type swingable sprayer 2000-12-26
6144059 Process and structure for increasing capacitance of stack capacitor 2000-11-07
6133597 Biasing an integrated circuit well with a transistor electrode Li-Chun Li, Huoy-Jong Wu, Saysamone Pittikoun, Wen-Wei Lo 2000-10-17
6069052 Process and structure for increasing capacitance of stack capacitor 2000-05-30
6063548 Method for making DRAM using a single photoresist masking step for making capacitors with node contacts Wen-Ting Chu 2000-05-16
6033963 Method of forming a metal gate for CMOS devices using a replacement gate process Jenn Ming Huang, Chi-Wen Su, Shui-Hung Chen 2000-03-07
5920780 Method of forming a self aligned contact (SAC) window 1999-07-06
5895945 Single polysilicon neuron MOSFET Hong-Tsz Pan, Ming-Tzong Yang 1999-04-20
5726086 Method of making self-aligned cylindrical capacitor structure of stack DRAMS 1998-03-10
5650346 Method of forming MOSFET devices with buried bitline capacitors Hong-Tsz Pan, Ming-Tzong Yang 1997-07-22
5633520 Neuron MOSFET with different interpolysilicon oxide Ming-Tzong Yang 1997-05-27
5554545 Method of forming neuron mosfet with different interpolysilicon oxide thickness Ming-Tzong Yang 1996-09-10
5541876 Memory cell fabricated by floating gate structure Chen-Chin Hsue, Ming-Tzong Yang 1996-07-30
5444411 Functional MOS transistor with gate-level weighted sum and threshold operations Ming-Tzong Yang 1995-08-22
5436190 Method for fabricating semiconductor device isolation using double oxide spacers Ming-Tzong Yang 1995-07-25
5350700 Method of fabricating bipolar transistors with buried collector region Ming-Tzong Yang 1994-09-27