Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12310093 | Semiconductor device and manufacturing method thereof | Chun-Hsiang Fan, Ta-Wei Lin, Shih-Hsiang Chiu, Kuo-Bin Huang, Chieh-Chun Chiang | 2025-05-20 |
| 11823945 | Method for cleaning semiconductor wafer | Wang-Hua Lin, Chun-Hsiang Fan, Ming-Hsi Yeh, Kuo-Bin Huang | 2023-11-21 |
| 11133200 | Substrate vapor drying apparatus and method | Chun-Hsiang Fan, Kuo-Bin Huang, Ming-Hsi Yeh | 2021-09-28 |
| 10658221 | Semiconductor wafer cleaning apparatus and method for cleaning semiconductor wafer | Wang-Hua Lin, Chun-Hsiang Fan, Ming-Hsi Yeh, Kuo-Bin Huang | 2020-05-19 |
| 9882031 | Method of manufacturing a horizontal gate-all-around transistor having a fin | Chia-Cheng Tai | 2018-01-30 |
| 9733570 | Multi-line width pattern created using photolithography | Bi-Ming Yen, Chun-Hung Lee, De-Fang Chen | 2017-08-15 |
| 9406749 | Method of manufacturing a horizontal gate-all-around transistor having a fin | Chia-Cheng Tai | 2016-08-02 |
| 9281307 | Plasma doping to reduce dielectric loss during removal of dummy layers in a gate structure | Yu-Lien Huang, Chia-Pin Lin, Sheng-Hsiung Wang, Fan-Yi Hsu | 2016-03-08 |
| 9176388 | Multi-line width pattern created using photolithography | Bi-Ming Yen, Chun-Hung Lee, De-Fang Chen | 2015-11-03 |
| 8431453 | Plasma doping to reduce dielectric loss during removal of dummy layers in a gate structure | Yu-Lien Huang, Chia-Pin Lin, Sheng-Hsiung Wang, Fan-Yi Hsu | 2013-04-30 |