Issued Patents All Time
Showing 26–35 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7071066 | Method and structure for forming high-k gates | Ming-Fang Wang, Chih-Wei Yang, Chi-Chun Chen, Tuo-Hung Hou, Yeou-Ming Lin +2 more | 2006-07-04 |
| 7052946 | Method for selectively stressing MOSFETs to improve charge carrier mobility | Chien-Hao Chen, Ju-Wang Hsu, Tze-Liang Lee, Shih-Chang Chen | 2006-05-30 |
| 7012009 | Method for improving the electrical continuity for a silicon-germanium film across a silicon/oxide/polysilicon surface using a novel two-temperature process | Kuen-Chyr Lee, Liang-Gi Yao, Tien-Chih Chang, Shih-Chang Chen, Mong-Song Liang | 2006-03-14 |
| 6933157 | Semiconductor wafer manufacturing methods employing cleaning delay period | Tze-Liang Lee, Shih-Chang Chen | 2005-08-23 |
| 6861339 | Method for fabricating laminated silicon gate electrode | Liang-Gi Yao, Shih-Chang Chen | 2005-03-01 |
| 6830996 | Device performance improvement by heavily doped pre-gate and post polysilicon gate clean | Tze-Liang Lee, Shih-Chang Chen | 2004-12-14 |
| 6821868 | Method of forming nitrogen enriched gate dielectric with low effective oxide thickness | Juing-Yi Cheng, T. L. Lee | 2004-11-23 |
| 6780741 | Method of forming a novel gate electrode structure comprised of a silicon-germanium layer located between random grained polysilicon layers | Liang-Gi Yao, Shih-Chang Chen | 2004-08-24 |
| 6759302 | Method of generating multiple oxides by plasma nitridation on oxide | Chien-Hao Chen, Mo Yu | 2004-07-06 |
| 6737362 | Method for manufacturing a thin gate dielectric layer for integrated circuit fabrication | Chun-Lin Wu, Chi-Chun Chen, Tze-Liang Lee, Shih-Chang Chen | 2004-05-18 |