Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12368103 | Diffusion barrier layer for conductive via to decrease contact resistance | Hsiu-Wen Hsueh, Chii-Ping Chen, Neng-Jye Yang, Ya-Lien Lee, Ya-Ching Tseng | 2025-07-22 |
| 12347771 | Semiconductor device having fuse array and method of making the same | Meng-Sheng Chang, Shao-Yu Chou, Po-Hsiang Huang, Chih-Hao Chen | 2025-07-01 |
| 12243816 | Semiconductor structure havbing an enhanced E-fuse and a method making the same | Po-Hsiang Huang, Derek Hsen Dai Hsu, Hsiu-Wen Hsueh, Meng-Sheng Chang | 2025-03-04 |
| 11742291 | Diffusion barrier layer for conductive via to decrease contact resistance | Hsiu-Wen Hsueh, Chii-Ping Chen, Neng-Jye Yang, Ya-Lien Lee, Ya-Ching Tseng | 2023-08-29 |
| 11626368 | Semiconductor device having fuse array and method of making the same | Meng-Sheng Chang, Shao-Yu Chou, Po-Hsiang Huang, Chih-Hao Chen | 2023-04-11 |
| 11410926 | E-fuse enhancement by underlayer layout design | Po-Hsiang Huang, Derek Hsen Dai Hsu, Hsiu-Wen Hsueh, Meng-Sheng Chang | 2022-08-09 |
| 11362035 | Diffusion barrier layer for conductive via to decrease contact resistance | Hsiu-Wen Hsueh, Chii-Ping Chen, Neng-Jye Yang, Ya-Lien Lee, Ya-Ching Tseng | 2022-06-14 |
| 11257757 | Semiconductor device having fuse array and method of making the same | Meng-Sheng Chang, Shao-Yu Chou, Po-Hsiang Huang, Chih-Hao Chen | 2022-02-22 |