Vivek Raghavan — 7 Patents at Synopsys

Vivek Raghavan has been granted 7 US patents while listed as an inventor at Synopsys. The first was granted in 1994 and the most recent in February 2017. Vivek Raghavan ranks #680,018 of 4,157,543 US inventors in our database (top 16.4%). Patent records list Vivek Raghavan in Mountain View, CA, US.

Issued Patents All Time

Showing 1–7 of 7 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
9576098	Lithography aware leakage analysis	Emre Tuncer, Hui Zheng, Anirudh Devgan, Amir Ajami, Alessandra Nardi +3 more	2017-02-21	$18,107,000
8572523	Lithography aware leakage analysis	Emre Tuncer, Hui Zheng, Anirudh Devgan, Amir Ajami, Alessandra Nardi +3 more	2013-10-29	$4,873,000
8473876	Lithography aware timing analysis	Emre Tuncer, Hui Zheng, Anirudh Devgan, Amir Ajami, Alessandra Nardi +3 more	2013-06-25	$3,652,000
7434188	Lithographically optimized placement tool	Anirudh Devgan, Roderick Metcalfe, Alfred Wong	2008-10-07	$1,917,000
6286126	Methods, apparatus and computer program products for performing post-layout verification of microelectronic circuits using best and worst case delay models for nets therein	Brian Zimmerman	2001-09-04	$4,106,000
5896300	Methods, apparatus and computer program products for performing post-layout verification of microelectronic circuits by filtering timing error bounds for layout critical nets	Brian Zimmerman	1999-04-20	$9,651,000
5313398	Method and apparatus for simulating a microelectronic circuit	Ronald A. Rohrer, J. Eric Bracken	1994-05-17

Vivek Raghavan — 7 Patents

Issued Patents All Time

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