Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9553445 | High-speed input circuit | Chia Leong Chin, Yee Shing Chew, Tai Hock Khoo | 2017-01-24 |
| 9245075 | Concurrent optimization of timing, area, and leakage power | Yiu-Chung Mang, Sanjay Dhar, Vishal Khandelwal | 2016-01-26 |
| 9189583 | Look-up based buffer tree synthesis | Sanjay Dhar, Sanjay V. Kumar, Prashant Saxena, Robert Walker | 2015-11-17 |
| 8924901 | Look-up based fast logic synthesis | Yiu-Chung Mang, Sanjay Dhar, Vishal Khandelwal | 2014-12-30 |