Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11797742 | Power aware real number modeling in dynamic verification of mixed-signal integrated circuit design | Diganchal Chakraborty, Jiri Prevratil, Shreedhar Ramachandra, Prasenjit Biswas | 2023-10-24 |
| 10769329 | Retention model with RTL-compatible default operating mode | Stephen T. Scherr, Todd M. Buzan | 2020-09-08 |
| 8255859 | Method and system for verification of multi-voltage circuit design | Srikanth Jadcherla, Sriram Kotni, Prapanna Tiwari | 2012-08-28 |
| 7558287 | Combined hardware and software implementation of link capacity adjustment scheme (LCAS) in SONET (synchronous optical network) virtual concatenation (VCAT) | Rakesh Malik, Dev Shankar Mukherjee, Dinesh Gupta | 2009-07-07 |
| 7546566 | Method and system for verification of multi-voltage circuit design | Srikanth Jadcherla, Sriram Kotni, Prapanna Tiwari | 2009-06-09 |