Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6106568 | Hierarchical scan architecture for design for test applications | James Beausang, Markus F. Robinson, Robert Walker | 2000-08-22 |
| 5949692 | Hierarchical scan architecture for design for test applications | James Beausang, Markus F. Robinson, Robert Walker | 1999-09-07 |
| 5903466 | Constraint driven insertion of scan logic for implementing design for test within an integrated circuit design | James Beausang, Robert Walker | 1999-05-11 |