Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12271668 | Finding equivalent classes of hard defects in stacked MOSFET arrays | Mayukh Bhattacharya, Michal Jerzy Rewienski, Shan-Fu Yuan, Michael Joseph Durr | 2025-04-08 |
| 11797737 | Finding equivalent classes of hard defects in stacked MOSFET arrays | Mayukh Bhattacharya, Michal Jerzy Rewienski, Shan-Fu Yuan, Michael Joseph Durr | 2023-10-24 |
| 11734482 | Visual representation to assess quality of input stimulus in transistor-level circuits | Mayukh Bhattacharya, Aleksandrs Krjukovs | 2023-08-22 |
| 11669667 | Automatic test pattern generation (ATPG) for parametric faults | Peilin Jiang, Mayukh Bhattacharya | 2023-06-06 |
| 11443092 | Defect weight formulas for analog defect simulation | Mayukh Bhattacharya, Miroslava Tzakova | 2022-09-13 |
| 10409941 | Visual representation of circuit related data | Mayukh Bhattacharya, Huiping Huang, Vinay Nulkar, Amelia Huimin Shen | 2019-09-10 |