| 9911810 |
Process for manufacturing a semiconductor power device comprising charge-balance column structures and respective device |
Cateno Marco Camalleri, Mario Giuseppe Saggio, Ferruccio Frisina |
2018-03-06 |
| 9607859 |
Process for manufacturing a semiconductor power device comprising charge-balance column structures and respective device |
Cateno Marco Camalleri, Mario Giuseppe Saggio, Ferruccio Frisina |
2017-03-28 |
| 9099322 |
Process for manufacturing a semiconductor power device comprising charge-balance column structures and respective device |
Cateno Marco Camalleri, Mario Giuseppe Saggio, Ferruccio Frisina |
2015-08-04 |
| 8304311 |
Process for manufacturing a semiconductor power device comprising charge-balance column structures and respective device |
Cateno Marco Camalleri, Mario Giuseppe Saggio, Ferruccio Frisina |
2012-11-06 |
| 7585743 |
Manufacturing method for a semiconductor substrate comprising at least a buried cavity and devices formed with this method |
Crocifisso Marco Antonio Renna, Luigi La Magna, Salvatore Coffa |
2009-09-08 |
| 7193256 |
Manufacturing method for a semiconductor substrate comprising at least a buried cavity and devices formed with this method |
Crocifisso Marco Antonio Renna, Luigi La Magna, Salvatore Coffa |
2007-03-20 |
| 7063798 |
Method for realizing microchannels in an integrated structure |
Alessio D'arrigo Guiseppe, Rosario Spinella, Guiseppe Arena |
2006-06-20 |
| 6806170 |
Method for forming an interface free layer of silicon on a substrate of monocrystalline silicon |
Peter Ward, Giuseppe Ferla |
2004-10-19 |
| 6642121 |
Control of amount and uniformity of oxidation at the interface of an emitter region of a monocrystalline silicon wafer and a polysilicon layer formed by chemical vapor deposition |
Cateno Marco Camalleri, Denise Cali′, Patrizia Vasquez, Giuseppe Ferla |
2003-11-04 |