Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 12360161 | Scan circuit and method | Venkata Narayanan Srinivasan, Shiv Kumar Vats | 2025-07-15 | |
| 11726140 | Scan circuit and method | Venkata Narayanan Srinivasan, Shiv Kumar Vats | 2023-08-15 | $30,975,000 |
| 11680982 | Automatic test pattern generation circuitry in multi power domain system on a chip | Venkata Narayanan Srinivasan, Manish Sharma | 2023-06-20 | $44,589,000 |
| 10151797 | Logic built-in self-test (LBIST) with pipeline scan enable launch on shift (LOS) flip-flop circuit | Venkata Narayanan Srinivasan | 2018-12-11 | $6,247,000 |
| 9222974 | System and method for reducing voltage drop during automatic testing of integrated circuits | V Srinivasan, Satinder Singh Malhi | 2015-12-29 | $2,206,000 |